The history of integrated circuit (IC) development is another record of human challenges
involving space. Efforts have been made to protect ICs from sudden malfunctions due to …

In nanometric technologies, circuits are increasingly sensitive to various kinds of
perturbations. Soft errors, a concern for space applications in the past, became a reliability …

Soft errors are an increasingly serious problem for logic circuits. To estimate the effects of
soft errors on such circuits, we develop a general computational framework based on …

In this paper, a new paradigm for designing logic circuits with concurrent error detection
(CED) is described. The key idea is to exploit the asymmetric soft error susceptibility of …

We propose the probabilistic transfer matrix (PTM) framework to capture nondeterministic
behavior in logic circuits. PTMs provide a concise description of both normal and faulty …

FPGAs have become prevalent in critical applications in which transient faults can seriously
affect the circuit's operation. We present a fault tolerance technique for transient and …

At each advanced technology node, it is crucial to characterize and understand the
mechanisms affecting performance and reliability. Scaling for all nodes prior to the 5-nm …

A new methodology for designing logic circuits with partial error masking is described. The
key idea is to exploit the asymmetric soft error susceptibility of nodes in a logic circuit by …

The importance of addressing soft errors in both safety critical applications and commercial
consumer products is increasing, mainly due to ever shrinking geometries, higher-density …

A new analytical modelling approach to evaluate the impact of single event transients
(SETs) on CMOS circuits has been developed. The model allows evaluation of transient …