As computer memory hierarchy becomes adaptive, its performance increasingly depends on
forecasting the dynamic program locality. This paper presents a method that predicts the …

The widespread use of object-oriented languages and Internet security concerns are just the
beginning. Add embedded systems, multiple memory banks, highly pipelined units …

Since the 1970's, microprocessor-based digital platforms have been riding Moore's law,
allowing for doubling of density for the same area roughly every two years. However …

Prefetching offers the potential to improve the performance of linked data structure (LDS)
traversals. However, previously proposed prefetching methods only work well when there is …

To narrow the widening gap between processor and memory performance, the authors
propose improving the cache locality of pointer-manipulating programs and bolstering …

This paper studies a memory-side prefetching technique to hide latency incurred by
inherently serial accesses to linked data structures (LDS). A programmable engine sits close …

As the processor-memory performance gap increases, so does the need for aggressive data
structure optimizations to reduce memory access latencies. Such optimizations require a …

Memory accesses represent a major bottleneck in embedded systems power and
performance. Traditionally, the local memory relied on a large cache to store all the …

In the worst case, one of the pointers points to data which is not even resident in main
memory. This can occur frequently in programs that deal with massive datasets. It is …

Irregular scientific codes experience poor cache performance due to their memory access
patterns. In this paper, we examine two issues for locality optimizations for irregular …