A review of recent research on heat transfer in three-dimensional integrated circuits (3-D ICs)

SS Salvi, A Jain - IEEE Transactions on Components …, 2021 - ieeexplore.ieee.org
Three-dimensional integrated circuits (3-D IC) technology has emerged in the past few
decades, driven in part by the techno-economic difficulties of dimensional scaling and the …

Review and projections of integrated cooling systems for three-dimensional integrated circuits

SG Kandlikar - Journal of Electronic Packaging, 2014 - asmedigitalcollection.asme.org
In an effort to increase processor speeds, 3D IC architecture is being aggressively pursued
by researchers and chip manufacturers. This architecture allows extremely high level of …

Method of constructing a semiconductor device and structure

Z Or-Bach, DC Sekar, B Cronquist, I Beinglass… - US Patent …, 2012 - Google Patents
2011-12-06 Assigned to MONOLITHIC 3D INC. reassignment MONOLITHIC 3D INC.
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …

Parametric numerical study of flow and heat transfer in microchannels with wavy walls

L Gong, K Kota, W Tao, Y Joshi - 2011 - asmedigitalcollection.asme.org
Wavy channels were investigated in this paper as a passive scheme to improve the heat
transfer performance of laminar fluid flow as applied to microchannel heat sinks. Parametric …

Multilevel semiconductor device and structure with memory

Z Or-Bach, JW Han - US Patent 10,515,981, 2019 - Google Patents
US10515981B2 - Multilevel semiconductor device and structure with memory - Google
Patents US10515981B2 - Multilevel semiconductor device and structure with memory …

An artificial neural network model for predicting frictional pressure drop in micro-pin fin heat sink

H Lee, M Kang, KW Jung, CR Kharangate… - Applied Thermal …, 2021 - Elsevier
This study is part of two studies conducted for develo** artificial neural-network-based
tools for predicting the thermal and hydraulic performance of micro-pin fin heat sinks used …

Method of forming three dimensional integrated circuit devices using layer transfer technique

Z Or-Bach, D Sekar, B Cronquist, Z Wurman - US Patent 8,642,416, 2014 - Google Patents
US8642416B2 - Method of forming three dimensional integrated circuit devices using layer
transfer technique - Google Patents US8642416B2 - Method of forming three dimensional …

Semiconductor device and structure

Z Or-Bach, B Cronquist, I Beinglass, JL De Jong… - US Patent …, 2013 - Google Patents
US8362482B2 - Semiconductor device and structure - Google Patents US8362482B2 -
Semiconductor device and structure - Google Patents Semiconductor device and structure Info …

[HTML][HTML] Chill and charge: A synergistic integration for future compact electronics

M Zhang, J Zhu, J Li, H Feng, D Hu, X Chen, Q Li - Device, 2024 - cell.com
Modern electronics advance through high integration and increased power density, yet
intricate thermal management techniques for high-power density chips limit the downsizing …

Integrated microfluidic cooling and interconnects for 2D and 3D chips

B Dang, MS Bakir, DC Sekar, CR King… - IEEE Transactions on …, 2010 - ieeexplore.ieee.org
Power dissipation in microprocessors is projected to reach a level that may necessitate chip-
level liquid cooling in the near future. An on-chip microchannel heat sink can reduce the …