Mapzero: Map** for coarse-grained reconfigurable architectures with reinforcement learning and monte-carlo tree search
Coarse-grained reconfigurable architecture (CGRA) has become a promising candidate for
data-intensive computing due to its flexibility and high energy efficiency. CGRA compilers …
data-intensive computing due to its flexibility and high energy efficiency. CGRA compilers …
An architecture-independent cgra compiler enabling openmp applications
Coarse-Grained reconfigurable architecture (CGRA) is a promising platform for HPC
systems in the post-Moore's era. A single-source programming model is essential for …
systems in the post-Moore's era. A single-source programming model is essential for …
Twenty years of automated methods for map** applications on cgra
KJM Martin - 2022 IEEE international parallel and distributed …, 2022 - ieeexplore.ieee.org
Coarse-Grained Reconfigurable Architectures (CGRAs) emerged about 30 years ago. The
very first CGRAs were programmed manually. Fortunately, some compilation approaches …
very first CGRAs were programmed manually. Fortunately, some compilation approaches …
GCN-RA: A graph convolutional network-based resource allocator for reconfigurable systems
SM Mohtavipour, HS Shahhoseini - Journal of Computational Science, 2023 - Elsevier
Nowadays, hardware architectures with various reconfiguration capabilities provide
significant computational speedup using parallelism and concurrency features. However …
significant computational speedup using parallelism and concurrency features. However …
DPU-v2: Energy-efficient execution of irregular directed acyclic graphs
A growing number of applications like probabilistic machine learning, sparse linear algebra,
robotic navigation, etc., exhibit irregular data flow computation that can be modeled with …
robotic navigation, etc., exhibit irregular data flow computation that can be modeled with …
An ASIC Accelerator for QNN With Variable Precision and Tunable Energy-Efficiency
Coarse-grained reconfigurable architectures (CGRA) are a power-efficient approach for
hardware accelerators. However, there are few EDA tools for CGRA. We develop hardware …
hardware accelerators. However, there are few EDA tools for CGRA. We develop hardware …
HierCGRA: A Novel Framework for Large-scale CGRA with Hierarchical Modeling and Automated Design Space Exploration
Coarse-grained reconfigurable arrays (CGRAs) are promising design choices in
computation-intensive domains, since they can strike a balance between energy efficiency …
computation-intensive domains, since they can strike a balance between energy efficiency …
A design exploration of scalable mesh-based fully pipelined accelerators
A dataflow graph is a computation abstraction with explicit dependencies that can be
automatically parallelized. This work focuses on map** dataflow graphs onto …
automatically parallelized. This work focuses on map** dataflow graphs onto …