Current multi-socket systems have complex memory hierarchies with significant Non-
Uniform Memory Access (NUMA) effects: memory performance depends on the location of …

Non Uniform Memory Access (NUMA) architectures are nowadays common for running High-
Performance Computing (HPC) applications. In such architectures, several distinct physical …

The parallel execution model of GPUs enables scaling to hundreds of thousands of threads,
which is a key capability that many modern high-performance applications exploit. GPU …

In this paper, we present first successes with building an SCC-related shared virtual memory
management system, called MetalSVM, that is implemented using a bare-metal hypervisor …

For the implementation of data-intensive C++ applications for cache coherent Non-Uniform
Memory Access (NUMA) systems, both massive parallelism and data locality have to be …

Data location is of prime importance when scheduling tasks in a non-uniform memory
access (NUMA) architecture. The characteristics of the NUMA architecture must be …

The growing number of cores per chip implies an increasing chip complexity, especially with
respect to hardware-implemented cache coherence protocols. An attractive alternative for …

Efficient use of computational resources is essential to get a high performance and a low
energy consumption. The operating system (OS) is responsible for managing all system …

Large state-of-the-art NUMA systems may offer more than two levels of node distances. The
result is a hierarchical architecture with significant differences in memory access bandwidth …