A general-purpose processor-per-pixel analog SIMD vision chip

P Dudek, PJ Hicks - IEEE Transactions on Circuits and Systems …, 2005 - ieeexplore.ieee.org
A smart-sensor VLSI circuit suitable for focal-plane low-level image processing applications
is presented. The architecture of the device is based on a fine-grain software-programmable …

[BOEK][B] Cellular neural networks, multi-scroll chaos and synchronization

JAK Suykens, J Vandewalle - 2005 - books.google.com
For engineering applications that are based on nonlinear phenomena, novel information
processing systems require new methodologies and design principles. This perspective is …

Navigating the landscape for real-time localization and map** for robotics and virtual and augmented reality

S Saeedi, B Bodin, H Wagstaff, A Nisbet… - Proceedings of the …, 2018 - ieeexplore.ieee.org
Visual understanding of 3-D environments in real time, at low power, is a huge
computational challenge. Often referred to as simultaneous localization and map** …

High-frame rate homography and visual odometry by tracking binary features from the focal plane

R Murai, S Saeedi, PHJ Kelly - Autonomous Robots, 2023 - Springer
Robotics faces a long-standing obstacle in which the speed of the vision system's scene
understanding is insufficient, impeding the robot's ability to perform agile tasks …

Analognet: Convolutional neural network inference on analog focal plane sensor processors

MZ Wong, B Guillard, R Murai, S Saeedi… - arxiv preprint arxiv …, 2020 - arxiv.org
We present a high-speed, energy-efficient Convolutional Neural Network (CNN) architecture
utilising the capabilities of a unique class of devices known as analog Focal Plane Sensor …

Auke: Automatic kernel code generation for an analogue simd focal-plane sensor-processor array

T Debrunner, S Saeedi, PHJ Kelly - ACM Transactions on Architecture …, 2019 - dl.acm.org
Focal-plane Sensor-Processor Arrays (FPSPs) are new imaging devices with parallel Single
Instruction Multiple Data (SIMD) computational capabilities built into every pixel. Compared …

Ultra-high frame rate focal plane image sensor and processor

A Zarandy, R Dominguez-Castro… - IEEE Sensors …, 2002 - ieeexplore.ieee.org
Application examples of a fully-programmable analogic focal plane array processor are
introduced. One mixed-signal sensory/processing chip is presented, which is capable of …

An asynchronous cellular logic network for trigger-wave image processing on fine-grain massively parallel arrays

P Dudek - IEEE Transactions on Circuits and Systems II …, 2006 - ieeexplore.ieee.org
Massively parallel processor-per-pixel single-instruction multiple data arrays are being
successfully used for early vision applications in smart sensor systems; however, they are …

[PDF][PDF] Accuracy and efficiency of grey-level image filtering on VLSI cellular processor arrays

P Dudek - Proc. CNNA, 2004 - personalpages.manchester.ac.uk
This paper discusses issues related to the efficiency of silicon implementations of cellular
processor arrays executing basic grey-level image processing operations-linear …

ASPA: Focal plane digital processor array with asynchronous processing capabilities

A Lopich, P Dudek - 2008 IEEE International Symposium on …, 2008 - ieeexplore.ieee.org
In this paper we present implementation and experimental results for a digital vision chip
that operates in mixed asynchronous/synchronous mode. Mixed configuration benefits from …