Methods for fault tolerance in networks-on-chip
Networks-on-Chip constitute the interconnection architecture of future, massively parallel
multiprocessors that assemble hundreds to thousands of processing cores on a single chip …
multiprocessors that assemble hundreds to thousands of processing cores on a single chip …
A survey of on-chip optical interconnects
Numerous challenges present themselves when scaling traditional on-chip electrical
networks to large manycore processors. Some of these challenges include high latency …
networks to large manycore processors. Some of these challenges include high latency …
The future of microprocessors
The future of microprocessors Page 1 MAy 2011 | vOl. 54 | nO. 5 | CommunICatIons of the aCm
67 MICroProCessors—sInGLe-ChIP CoMPUters—are the building blocks of the information …
67 MICroProCessors—sInGLe-ChIP CoMPUters—are the building blocks of the information …
A survey on coarse-grained reconfigurable architectures from a performance perspective
With the end of both Dennard's scaling and Moore's law, computer users and researchers
are aggressively exploring alternative forms of computing in order to continue the …
are aggressively exploring alternative forms of computing in order to continue the …
System level analysis of fast, per-core DVFS using on-chip switching regulators
W Kim, MS Gupta, GY Wei… - 2008 IEEE 14th …, 2008 - ieeexplore.ieee.org
Portable, embedded systems place ever-increasing demands on high-performance, low-
power microprocessor design. Dynamic voltage and frequency scaling (DVFS) is a well …
power microprocessor design. Dynamic voltage and frequency scaling (DVFS) is a well …
A highly parallel framework for HEVC coding unit partitioning tree decision on many-core processors
High Efficiency Video Coding (HEVC) uses a very flexible tree structure to organize coding
units, which leads to a superior coding efficiency compared with previous video coding …
units, which leads to a superior coding efficiency compared with previous video coding …
Scheduling and locking in multiprocessor real-time operating systems
BB Brandenburg - 2011 - search.proquest.com
With the widespread adoption of multicore architectures, multiprocessors are now a
standard deployment platform for (soft) real-time applications. This dissertation addresses …
standard deployment platform for (soft) real-time applications. This dissertation addresses …
Firefly: Illuminating future network-on-chip with nanophotonics
Future many-core processors will require high-performance yet energy-efficient on-chip
networks to provide a communication substrate for the increasing number of cores. Recent …
networks to provide a communication substrate for the increasing number of cores. Recent …
Silicon-photonic clos networks for global on-chip communication
Future manycore processors will require energy-efficient, high-throughput on-chip networks.
Silicon-photonics is a promising new interconnect technology which offers lower power …
Silicon-photonics is a promising new interconnect technology which offers lower power …
A highly resilient routing algorithm for fault-tolerant NoCs
Current trends in technology scaling foreshadow worsening transistor reliability as well as
greater numbers of transistors in each system. The combination of these factors will soon …
greater numbers of transistors in each system. The combination of these factors will soon …