Survey of scheduling techniques for addressing shared resources in multicore processors

S Zhuravlev, JC Saez, S Blagodurov… - ACM Computing …, 2012 - dl.acm.org
Chip multicore processors (CMPs) have emerged as the dominant architecture choice for
modern computing platforms and will most likely continue to be dominant well into the …

Bubble-up: Increasing utilization in modern warehouse scale computers via sensible co-locations

J Mars, L Tang, R Hundt, K Skadron… - Proceedings of the 44th …, 2011 - dl.acm.org
As much of the world's computing continues to move into the cloud, the overprovisioning of
computing resources to ensure the performance isolation of latency-sensitive tasks, such as …

Utility-based cache partitioning: A low-overhead, high-performance, runtime mechanism to partition shared caches

MK Qureshi, YN Patt - 2006 39th Annual IEEE/ACM …, 2006 - ieeexplore.ieee.org
This paper investigates the problem of partitioning a shared cache between multiple
concurrently executing applications. The commonly used LRU policy implicitly partitions a …

CPI2 CPU performance isolation for shared compute clusters

X Zhang, E Tune, R Hagmann, R Jnagal… - Proceedings of the 8th …, 2013 - dl.acm.org
Performance isolation is a key challenge in cloud computing. Unfortunately, Linux has few
defenses against performance interference in shared resources such as processor caches …

Addressing shared resource contention in multicore processors via scheduling

S Zhuravlev, S Blagodurov, A Fedorova - ACM Sigplan Notices, 2010 - dl.acm.org
Contention for shared resources on multicore processors remains an unsolved problem in
existing systems despite significant research efforts dedicated to this problem in the past …

Parallelism-aware batch scheduling: Enhancing both performance and fairness of shared DRAM systems

O Mutlu, T Moscibroda - ACM SIGARCH Computer Architecture News, 2008 - dl.acm.org
In a chip-multiprocessor (CMP) system, the DRAM system isshared among cores. In a
shared DRAM system, requests from athread can not only delay requests from other threads …

Stall-time fair memory access scheduling for chip multiprocessors

O Mutlu, T Moscibroda - 40th Annual IEEE/ACM International …, 2007 - ieeexplore.ieee.org
DRAM memory is a major resource shared among cores in a chip multiprocessor (CMP)
system. Memory requests from different threads can interfere with each other. Existing …

Fair cache sharing and partitioning in a chip multiprocessor architecture

S Kim, D Chandra, Y Solihin - Proceedings. 13th International …, 2004 - ieeexplore.ieee.org
This paper presents a detailed study of fairness in cache sharing between threads in a chip
multiprocessor (CMP) architecture. Prior work in CMP architectures has only studied …

Vantage: Scalable and efficient fine-grain cache partitioning

D Sanchez, C Kozyrakis - Proceedings of the 38th annual international …, 2011 - dl.acm.org
Cache partitioning has a wide range of uses in CMPs, from guaranteeing quality of service
and controlled sharing to security-related techniques. However, existing cache partitioning …

KPart: A hybrid cache partitioning-sharing technique for commodity multicores

N El-Sayed, A Mukkara, PA Tsai… - … Symposium on High …, 2018 - ieeexplore.ieee.org
Cache partitioning is now available in commercial hardware. In theory, software can
leverage cache partitioning to use the last-level cache better and improve performance. In …