Pin: building customized program analysis tools with dynamic instrumentation

CK Luk, R Cohn, R Muth, H Patil, A Klauser… - Acm sigplan …, 2005 - dl.acm.org
Robust and powerful software instrumentation tools are essential for program analysis tasks
such as profiling, performance evaluation, and bug detection. To meet this need, we have …

Pinpointing representative portions of large intel® itanium® programs with dynamic instrumentation

H Patil, R Cohn, M Charney, R Kapoor… - … (MICRO-37'04), 2004 - ieeexplore.ieee.org
Detailed modeling of the performance of commercial applications is difficult. The
applications can take a very long time to run on real hardware and it is impractical to …

SPEC OMP2012—an application benchmark suite for parallel systems using OpenMP

MS Müller, J Baron, WC Brantley, H Feng… - … Workshop on OpenMP, 2012 - Springer
This paper describes SPEC OMP2012, a benchmark developed by the SPEC High
Performance Group. It consists of 15 OpenMP parallel applications from a wide range of …

First experiences in performance benchmarking with the new SPEChpc 2021 suites

H Brunst, S Chandrasekaran, FM Ciorba… - 2022 22nd IEEE …, 2022 - ieeexplore.ieee.org
Modern High Performance Computing (HPC) sys-tems are built with innovative system
architectures and novel programming models to further push the speed limit of computing …

SPEC MPI2007—an application benchmark suite for parallel systems using MPI

MS Müller, M Van Waveren… - Concurrency and …, 2010 - Wiley Online Library
Abstract The SPEC High‐Performance Group has developed the benchmark suite SPEC
MPI2007 and its run rules over the last few years. The purpose of the SPEC MPI2007 …

autopin–automated optimization of thread-to-core pinning on multicore systems

T Klug, M Ott, J Weidendorfer, C Trinitis - Transactions on high …, 2011 - Springer
In this paper we present a framework for automatic detection and application of the best
binding between threads of a running parallel application and processor cores in a shared …

Evaluating OpenMP on chip multithreading platforms

C Liao, Z Liu, L Huang, B Chapman - … 2005 and IWOMP 2006, Eugene, OR …, 2008 - Springer
Recent computer architectures provide new kinds of on-chip parallelism, including support
for multithreading. This trend toward hardware support for multithreading is expected to …

Exploring cache size and core count tradeoffs in systems with reduced memory access latency

PC Santos, MAZ Alves, M Diener… - 2016 24th Euromicro …, 2016 - ieeexplore.ieee.org
One of the main challenges for computer architects is how to hide the high average memory
access latency from the processor. In this context, Hybrid Memory Cubes (HMCs) can …

[图书][B] Programming for Hybrid Multi/Manycore MPP Systems

J Levesque, A Vose - 2017 - taylorfrancis.com
" Ask not what your compiler can do for you, ask what you can do for your compiler."--John
Levesque, Director of Cray's Supercomputing Centers of Excellence The next decade of …

Performance characteristics of OpenMP constructs, and application benchmarks on a large symmetric multiprocessor

NR Fredrickson, A Afsahi, Y Qian - Proceedings of the 17th annual …, 2003 - dl.acm.org
With the increasing popularity of small to large-scale symmetric multiprocessor (SMP)
systems, there has been a dire need to have sophisticated, and flexible development and …