Software/hardware co-design of modular exponentiation for efficient RSA cryptosystem

M Issad, B Boudraa, M Anane… - Journal of Circuits, Systems …, 2014 - World Scientific
This paper presents an implementation of Rivest, Shamir and Adleman (RSA) cryptosystem
based on hardware/software (HW/SW) co-design. The main operation of RSA is the modular …

HCrypt: a novel concept of crypto-processor with secured key management

L Gaspar, V Fischer, F Bernard… - 2010 International …, 2010 - ieeexplore.ieee.org
The paper presents a novel concept of processor aimed at symmetric-key cryptographic
applications. Its architecture is optimized for implementation of common cryptography tasks …

Hardware-software co-design of elliptic curve digital signature algorithm over binary fields

B Panjwani, DC Mehta - 2015 International Conference on …, 2015 - ieeexplore.ieee.org
Elliptic curve digital signature algorithm (ECDSA) is elliptic curve analogue of digital
signature algorithm. This paper presents implementation of ECDSA on NIST recommended …

Secure extension of FPGA general purpose processors for symmetric key cryptography with partial reconfiguration capabilities

L Gaspar, V Fischer, L Bossuet, R Fouquet - ACM Transactions on …, 2012 - dl.acm.org
In data security systems, general purpose processors (GPPs) are often extended by a
cryptographic accelerator. The article presents three ways of extending GPPs for symmetric …

[PDF][PDF] A comprehensive evaluation of the Rivest-Shamir-Adleman (RSA) algorithm performance on operating systems using different key bit sizes

K Assa-Agyei, F Olajide - International Journal of Computer Applications - academia.edu
In today's digital world, practically everyone uses the Internet for various purposes. Most
data sent over the Internet contains personal or private information that people desire to …

Design of High Performance MIPS Cryptography Processor

KP Singh, S Parmar, D Kumar - … 2013, Greader Noida, India, January 11 …, 2013 - Springer
This paper presents the design and implementation of low power 32-bit encrypted and
decrypted MIPS processor for Data Encryption Standard (DES), Triple DES, Advanced …

Secure extensions of FPGA soft core processors for symmetric key cryptography

L Gaspar, V Fischer, L Bossuet… - … -Centric Systems-on …, 2011 - ieeexplore.ieee.org
When used in cryptographic applications, general-purpose processors are often completed
by a cryptographic accelerator-crypto-coprocessor. Secret keys are usually stored in the …

Cryptographic extension for soft general-purpose processors with secure key management

L Gaspar, V Fischer, L Bossuet… - 2011 21st International …, 2011 - ieeexplore.ieee.org
General-purpose processors are not suitable for secure cryptographic key management.
Secret keys are usually stored in the internal registers of the processor, and simple attacks …

Performance evaluation of low power MIPS crypto processor based on cryptography algorithms

KP Singh, D Kumar - arxiv preprint arxiv:1306.1916, 2013 - arxiv.org
This paper presents the design and implementation of low power 32-bit encrypted and
decrypted MIPS processor for Data Encryption Standard (DES), Triple DES, Advanced …

A low-resource 32-bit datapath ECDSA design for embedded applications

NBH Youssef, WEH Youssef… - 2014 International …, 2014 - ieeexplore.ieee.org
In this paper we describe a hardware implementation of a low resource digital signature
design using Elliptic Curve Digital Signature Algorithm (ECDSA). The implementation of …