A comprehensive review on microwave FinFET modeling for progressing beyond the state of art
FinFET is a multiple-gate silicon transistor structure that nowadays is attracting an extensive
attention to progress further into the nanometer era by going beyond the downscaling limit of …
attention to progress further into the nanometer era by going beyond the downscaling limit of …
A capacitance-compensation technique for improved linearity in CMOS class-AB power amplifiers
C Wang, M Vaidyanathan… - IEEE journal of solid-state …, 2004 - ieeexplore.ieee.org
A nonlinear capacitance-compensation technique is developed to help improve the linearity
of CMOS class-AB power amplifiers. The method involves placing a PMOS device alongside …
of CMOS class-AB power amplifiers. The method involves placing a PMOS device alongside …
Device design guideline of 5-nm-node FinFETs and nanosheet FETs for analog/RF applications
Analog/RF performances of 5-nm node bulk fin-shaped field-effect transistors (FinFETs) and
nanosheet FETs (NSFETs) were investigated and compared thoroughly using fully …
nanosheet FETs (NSFETs) were investigated and compared thoroughly using fully …
A Ka-Band Doherty-Like LMBA for High-Speed Wireless Communication in 28-nm CMOS
This article presents a millimeter-wave (mm-wave) Doherty-like load modulated balanced
amplifier (LMBA) for high-speed wireless communication in a 28-nm bulk CMOS process …
amplifier (LMBA) for high-speed wireless communication in a 28-nm bulk CMOS process …
Device and technology evolution for Si-based RF integrated circuits
The relationships between device feature size and device performance figures of merit
(FoMs) are more complex for radio frequency (RF) applications than for digital applications …
(FoMs) are more complex for radio frequency (RF) applications than for digital applications …
-Band Low-Loss and High-Isolation Switch Design in 0.13- CMOS
This paper presents designs and measurements of Ka-band single-pole single-throw
(SPST) and single-pole double-throw (SPDT) 0.13-CMOS switches. Designs based on …
(SPST) and single-pole double-throw (SPDT) 0.13-CMOS switches. Designs based on …
[图书][B] Compact models for integrated circuit design: conventional transistors and beyond
SK Saha - 2015 - library.oapen.org
This modern treatise on compact models for circuit computer-aided design (CAD) presents
industry standard models for bipolar-junction transistors (BJTs), metal-oxide-semiconductor …
industry standard models for bipolar-junction transistors (BJTs), metal-oxide-semiconductor …
Calibrations for millimeter-wave silicon transistor characterization
This paper compares on-wafer thru-reflect-line (TRL) and off-wafer short-open-load-thru
(SOLT) and line-reflect-reflect-match (LRRM) vector-network-analyzer probe-tip calibrations …
(SOLT) and line-reflect-reflect-match (LRRM) vector-network-analyzer probe-tip calibrations …
Effect of gate-oxide breakdown on RF performance
H Yang, JS Yuan, Y Liu, E **ao - IEEE Transactions on Device …, 2003 - ieeexplore.ieee.org
The degradation of S-parameters of 0.16-/spl mu/m nMOS devices due to gate-oxide
breakdown is examined. An equivalent circuit model for MOSFETs after gate-oxide …
breakdown is examined. An equivalent circuit model for MOSFETs after gate-oxide …