We present a robust, efficient algorithm for combinational test generation using a reduction
to satisfiability (SAT). The algorithm, Test Generation Using Satisfiability (TEGUS), solves a …

FIRE is a novel Fault-Independent algorithm for combinational REdundancy identification.
The algorithm is based on a simple concept that a fault which requires a conflict as a …

A new technique called input reduction is proposed for built-in self test (BIST) test pattern
generator (TPG) design and test set compaction. This technique analyzes the circuit function …

This article proposes an efficient method to identify untestable faults in sequential circuits. It
uses a controllability calculation and symbolic simulation procedure that propagates the …

This paper describes a new technique to design efficient test pattern generators (TPGs) for
built-in self-test (BIST). The proposed technique identifies compatible circuit inputs that can …

In this paper, we first present an algorithm (FILL) to efficiently identify a large subset of illegal
states in synchronous sequential circuits, without assuming a global reset mechanism. A …

This paper presents a novel fault independent algorithm for redundancy identification (FIRE)
in combinational circuits. The algorithm is based on a simple concept that a fault which …

This paper presents a novel fault-independent algorithm for identifying untestable faults in
sequential circuits. The algorithm is based on a simple concept that a fault which requires an …

This work provides a survey study of several outlier analysis techniques and compares their
effectiveness in the context of delay testing. Three different approaches are studied, an …

Through their simulation-based engineering (SBE) design partnership, Goodyear achieved
a substantial competitive advantage in new product development and Sandia National …