2015-10-28 Assigned to MagnaCom Ltd. reassignment MagnaCom Ltd. ASSIGNMENT OF
ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: BENJO, SHIMON …

A nonvolatile memory system, a nonvolatile memory controller and a method for reducing
latency of a memory controller are disclosed. Upon the occurrence of one or more of an …

A nonvolatile memory storage controller for delivering log likelihood ratios (LLRs) to a low-
density parity check (LDPC) decoder for use in the decoding of an LDPC encoded …

Abstract A Solid State Drive (SSD) that includes a host connector receptacle for connecting
to a host computer, a plurality of NAND devices and a nonvolatile memory controller. The …

A nonvolatile memory storage controller is provided for delivering log likelihood ratios
(LLRs) to a low-density parity check (LDPC) decoder for use in the decoding of an LDPC …

A system and method reading, accumulating and processing soft information for use in
LDPC decoding. In accordance with the present invention, an LDPC decoder includes …

A nonvolatile memory storage controller is provided for delivering log likelihood ratios
(LLRs) to a low-density parity check (LDPC) decoder for use in the decoding of an LDPC …

A nonvolatile memory controller includes memory storage configured to store a two-index
look-up table that includes a Log-Likelihood Ratio (LLR), hard-and-soft-decision bits …

A nonvolatile memory controller and a method for erase suspend management are
disclosed. The nonvolatile memory controller includes an erase suspend circuit configured …

A nonvolatile memory controller is disclosed that includes a read circuit configured to read
memory cells of a nonvolatile memory device and a program and erase circuit configured to …