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Design trends and perspectives of digital low dropout voltage regulators for low voltage mobile applications: A review
Low-dropout (LDO) voltage regulator has fascinated industry professionals and academia
for the past few decades, and this trend is expected to continue in the coming years. The …
for the past few decades, and this trend is expected to continue in the coming years. The …
An output-capacitor-free synthesizable digital LDO using CMP-triggered oscillator and droop detector
This article presents a synthesizable digital low-dropout regulator (DLDO) that precludes the
use of an output load capacitor. For efficient regulation, the DLDO consists of fine and …
use of an output load capacitor. For efficient regulation, the DLDO consists of fine and …
Architectural advancement of digital low-dropout regulators
Digital Low-dropout (DLDO) regulators have been widely utilised for highly-efficient fine-
grained power delivery and management in system-on-chips (SoCs) due to their process …
grained power delivery and management in system-on-chips (SoCs) due to their process …
Categorization and characterization of time domain CMOS temperature sensors
S Byun - Sensors, 2020 - mdpi.com
Time domain complementary metal-oxide-semiconductor (CMOS) temperature sensors
estimate the temperature of a sensory device by measuring the frequency, period and/or …
estimate the temperature of a sensory device by measuring the frequency, period and/or …
A capacitorless external-clock-free fully synthesizable digital LDO with time-based load-state decision and asynchronous recovery
This article presents an external-clock-free fully synthesizable digital low-dropout regulator
(DLDO) without an output capacitor. To lower quiescent current in a steady state, time-based …
(DLDO) without an output capacitor. To lower quiescent current in a steady state, time-based …
Capacitor-less dual-mode all-digital LDO with ΔΣ-modulation-based ripple reduction
This brief presents a capacitor-less digital low-dropout (DLDO) regulator, which has low
steady-state voltage ripples (V RIPP) and low output noise, suitable for driving analog …
steady-state voltage ripples (V RIPP) and low output noise, suitable for driving analog …
A Tri-loop Fast-transient Digital LDO with Adaptive-gain Control and Fine-loop Freezer
In this paper, a fully-integrated digital low dropout (DLDO) regulator is proposed utilizing a
multi-bits shift handler (MBSH), decremental-gain PMOS array, and adaptive coarse loop …
multi-bits shift handler (MBSH), decremental-gain PMOS array, and adaptive coarse loop …
A Self-Calibrated Unified Voltage-and-Frequency Regulator System Design Based on Universal Logic Line Circuit
J Liu, H Zhao, Z Li, K Wang… - IEEE Transactions on Very …, 2024 - ieeexplore.ieee.org
In this brief, a unified voltage frequency regulator (UVFR) system is designed to eliminate
the voltage margin induced by process, voltage, and temperature (PVT) variations. The …
the voltage margin induced by process, voltage, and temperature (PVT) variations. The …
A Transient Response Improved Digital LDO with an Approximate CEAG Analog-to-Frequency Domain Converter
F Li, T Yin, F Wang, Z Yuan - 2024 IEEE International …, 2024 - ieeexplore.ieee.org
A transient response improved digital low dropout regulator (D-LDO) is proposed in this
work. With an proposed approximate constant and exponential-adaptive gain (CEAG) …
work. With an proposed approximate constant and exponential-adaptive gain (CEAG) …
A fully integrated fast transient response digital low-dropout regulator with built-in sampling clock
M **n, Y Ye, D Wang, M Li - Microelectronics Journal, 2023 - Elsevier
A fast transient digital low-dropout regulator (LDO), in which the sampling clock is adaptively
generated by a voltage-controlled oscillator, is proposed in this paper. In steady state, the …
generated by a voltage-controlled oscillator, is proposed in this paper. In steady state, the …