Methods and apparatus for providing individualized power control for peripheral sub-systems

S Garg, K Sanghi, V Petkov, R Solotke - US Patent 10,775,871, 2020 - Google Patents
Methods and apparatus for isolation of sub-system resources (such as clocks, power, and
reset) within independent domains. In one embodiment, each sub-system of a system has …

Methods and apparatus for providing peripheral sub-system stability

S Garg, K Sanghi, V Petkov, R Solotke - US Patent 10,591,976, 2020 - Google Patents
US10591976B2 - Methods and apparatus for providing peripheral sub-system stability -
Google Patents US10591976B2 - Methods and apparatus for providing peripheral sub-system …

Hybrid hardware and software implementation of transactional memory access

S Kumar, CJ Hughes, P Kundu, A Nguyen - US Patent 7,856,537, 2010 - Google Patents
BACKGROUND 1. Field Embodiments of the invention relate to the field of trans actional
memory. More particularly, embodiments of the invention relate to a hybridhardware and …

Methods and apparatus for locking at least a portion of a shared memory resource

V Petkov, H Zhang, K Sanghi, S Garg - US Patent 10,191,852, 2019 - Google Patents
US10191852B2 - Methods and apparatus for locking at least a portion of a shared memory
resource - Google Patents US10191852B2 - Methods and apparatus for locking at least a portion …

Method of read-set and write-set management by distinguishing between shared and non-shared memory regions

YC Chou - US Patent 8,209,499, 2012 - Google Patents
US8209499B2 - Method of read-set and write-set management by distinguishing between
shared and non-shared memory regions - Google Patents US8209499B2 - Method of read-set …

Hybrid hardware and software implementation of transactional memory access

S Kumar, CJ Hughes, P Kundu, A Nguyen - US Patent 8,661,206, 2014 - Google Patents
BACKGROUND 1. Field Embodiments of the invention relate to the field of trans actional
memory. More particularly, embodiments of the invention relate to a hybridhardware and …

Method and System for Handling Transaction Buffer Overflow In A Multiprocessor System

X Shen, HY Wang, K Wang - US Patent App. 12/325,866, 2009 - Google Patents
BACKGROUND 0002. A transaction is a concept widely used in the com puter field. A
transaction generally refers to the execution of a plurality of instructions in an atomic-like …

Methods and apparatus for reduced-latency data transmission with an inter-processor communication link between independently operable processors

V Petkov, S Garg, K Sanghi, H Zhang - US Patent 10,331,612, 2019 - Google Patents
Methods and apparatus for data transmissions over an inter processor communication (IPC)
link between two (or more) independently operable processors. In one embodiment, the IPC …

Methods and apparatus for transmitting time sensitive data over a tunneled bus interface

J McElrath, K Sanghi, S Garg - US Patent 10,346,226, 2019 - Google Patents
Methods and apparatus for time sensitive data transfer between logical domains. In one
embodiment, an user equipment (UE) device has an application processor (AP) coupled to a …

Methods and apparatus for active queue management in user space networking

CA Masputra, S Nair, D Jewell - US Patent 11,843,683, 2023 - Google Patents
US11843683B2 - Methods and apparatus for active queue management in user space
networking - Google Patents US11843683B2 - Methods and apparatus for active queue …