With the down-scaling of CMOS technology, the design complexity of very large-scale
integrated is increasing. Although the application of machine learning (ML) techniques in …

Effectively managing energy and power consumption is crucial to the success of the design
of any computing system, hel** mitigate the efficiency obstacles given by the downsizing …

Demand for low-power data processing hardware continues to rise inexorably. Existing
programmable and" general purpose" solutions (eg. SIMD, GPGPUs) are insufficient, as …

Increasing demand for power-efficient, high-performance computing has spurred a growing
number and diversity of hardware accelerators in mobile and server Systems on Chip …

Domain-specific hardware accelerators can provide orders of magnitude speedup and
energy efficiency over general purpose processors. However, they require extensive manual …

Modern heterogeneous FPGA architectures incorporate a variety of hardened blocks for
boosting the performance of arithmetic-intensive designs, such as DSP blocks and carry …

Coarse-Grained Reconfigurable Architectures (CGRAs) provide an excellent balance
between performance, energy efficiency, and flexibility. However, increasingly sophisticated …

Specialized on-chip accelerators are widely used to improve the energy efficiency of
computing systems. Recent advances in memory technology have enabled near-data …

Adopting FPGA as an accelerator in datacenters is becoming mainstream for customized
computing, but the fact that FPGAs are hard to program creates a steep learning curve for …

Modern high-level synthesis (HLS) tools greatly reduce the turn-around time of designing
and implementing complex FPGA-based accelerators. They also expose various …