Hardware accelerators are being increasingly deployed to boost the performance and
energy efficiency of deep neural network (DNN) inference. In this paper we propose …

Variation in performance and power across manufactured parts and their operating
conditions is an accepted reality in modern microelectronic manufacturing processes with …

Resilient designs offer the promise to remove increasingly large margins due to process,
voltage, and temperature variations and take advantage of average-case data. However …

We propose the use of multiple gateways to significantly reduce latency and energy
consumption in multi-hop wireless sensor networks during data aggregation. We have …

This paper presents a near-threshold operating voltage timing error detecting 32-bit
microcontroller system. The lightweight in situ error detection and correction technique uses …

As dynamic variability increases with CMOS scaling, it is essential to incorporate large
design-time timing margins to ensure yield and reliable operation. Online techniques for …

In situ monitoring is an accurate way to monitor circuit delay or timing slack, but usually
incurs significant overhead. We observe that most existing slack monitoring methods …

This paper presents an innovative approach for predicting timing errors tailored to near-/sub-
threshold operations, addressing the energy-efficient requirements of digital circuits in …

We formulate the problem of energy consumption and reliability oriented application
map** on regular Network-on-Chip topologies. We propose a novel branch-and-bound …

By allowing the occurrence of infrequent timing errors and correcting them with rollback
mechanisms, the so-called timing speculation (TS) technique can significantly improve …