Resonant-clock design for a power-efficient, high-volume x86-64 microprocessor
VS Sathe, S Arekapudi, A Ishii… - IEEE Journal of Solid …, 2012 - ieeexplore.ieee.org
AMD's 32-nm x86-64 core code-named “Piledriver” features a resonant global clock
distribution to reduce clock distribution power while maintaining a low clock skew. To …
distribution to reduce clock distribution power while maintaining a low clock skew. To …
[LIBRO][B] Timing optimization through clock skew scheduling
The results of the various clock skew scheduling methodologies described in this research
monograph are presented in this chapter. Results of each application are presented in …
monograph are presented in this chapter. Results of each application are presented in …
Uniform-phase uniform-amplitude resonant-load global clock distributions
This work presents a new approach to global clock distribution in which tree-driven grids are
augmented with on-chip spiral inductors to resonate the clock capacitance. In this scheme …
augmented with on-chip spiral inductors to resonate the clock capacitance. In this scheme …
A 1.25-GHz Fully Integrated DC–DC Converter Using Electromagnetically Coupled Class-D LC Oscillators
Fully integrated power management circuits are promising candidates to provide small form
factors and meet high power density demand of modern computing platforms. This article …
factors and meet high power density demand of modern computing platforms. This article …
A resonant global clock distribution for the cell broadband engine processor
Resonant clock distributions have the potential to save power by recycling energy from cycle-
to-cycle while at the same time improving performance by reducing the clock distribution …
to-cycle while at the same time improving performance by reducing the clock distribution …
Resonant-clock latch-based design
This paper describes RF1 and RF2, two level-clocked test-chips that deploy resonant
clocking to reduce power consumption in their clock distribution networks. It also highlights …
clocking to reduce power consumption in their clock distribution networks. It also highlights …
Revisiting automated physical synthesis of high-performance clock networks
High-performance clock distribution has been a challenge for nearly three decades. During
this time, clock synthesis tools and algorithms have strove to address a myriad of important …
this time, clock synthesis tools and algorithms have strove to address a myriad of important …
On the design of reversible QDCA systems
This work is the first to describe how to go about designing a reversible QDCA system. The
design space is substantial, and there are many questions that a designer needs to answer …
design space is substantial, and there are many questions that a designer needs to answer …
Distributed differential oscillators for global clock networks
This paper presents a distributed differential oscillator global clock network where the clock
capacitance is rendered resonant with a set of on-chip spiral inductors. The clock amplitude …
capacitance is rendered resonant with a set of on-chip spiral inductors. The clock amplitude …
Systems and methods for distributing a clock signal
S Chan, KL Shepard, Z Xu - US Patent 7,880,551, 2011 - Google Patents
Related US Application Data Systems and methods for distributing a clock signal are dis
closed. In some embodiments, systems for distributing a (60) Provisional application No …
closed. In some embodiments, systems for distributing a (60) Provisional application No …