FinFET to GAA MBCFET: a review and insights

RR Das, TR Rajalekshmi, A James - IEEE Access, 2024 - ieeexplore.ieee.org
This review article presents a journey from Fin-shaped field effect transistor (FinFET) to gate-
all-around multi-bridge channel field effect transistor (GAA MBCFET) technology, unraveling …

Temperature effect on RF/analog and linearity parameters in DMG FinFET

R Saha, B Bhowmick, S Baishya - Applied Physics A, 2018 - Springer
We systemically investigated the impact of variation in temperature on electrical parameters
for a dual material gate (DMG) FinFET. We have highlighted the DC performance such as …

Design insights into a junctionless nanosheet FET (JL-NSFET) for switching and analog/RF applications: device to circuit level assessment

V Bheemudu, D Vaithiyanathan, B Kaur - Microelectronics Journal, 2024 - Elsevier
The advent in semiconductor technology paved the way for electronic industry to place in
front row. The nanosheet (NS) device is a type gate all around (GAA) architecture provides …

Analytical modeling of a dual-material graded-channel cylindrical gate-all-around FET to minimize the short-channel effects

PK Mudidhe, BR Nistala - Journal of Computational Electronics, 2023 - Springer
In this paper, an analytical model for center potential and threshold voltage is developed for
a dual-material graded-channel cylindrical gate-all-around (DMGC CGAA) FET by …

Surface potential modeling of graded-channel gate-stack (GCGS) high-K dielectric dual-material double-gate (DMDG) MOSFET and analog/RF performance study

V Narendar, KA Girdhardas - silicon, 2018 - Springer
In each complementary metal-oxide-semiconductor (CMOS) technology generation, design
of new device architectures at nanoscale regime becomes quite challenging task due to …

A holistic approach on Junctionless dual material double gate (DMDG) MOSFET with high k gate stack for low power digital applications

S Darwin, TS Arun Samuel - silicon, 2020 - Springer
The 2D analytical models for electrostatic potential, threshold voltage, subthreshold swing,
Drain Induced Barrier Lowering (DIBL) and drain current of the Dual Material Double Gate …

Performance enhancement of FinFET devices with gate-stack (GS) high-K dielectrics for Nanoscale applications

V Narendar - Silicon, 2018 - Springer
Abstract The Fin shaped Field Effect Transistors (FinFETs), are the front runner of the current
sub-nanometer technology node. The semiconductor industry adopts it in high-performance …

A novel bottom-spacer ground-plane (BSGP) FinFET for improved logic and analog/RF performance

N Vadthiya, P Narware, V Bheemudu… - AEU-International Journal …, 2020 - Elsevier
FinFET for system-on-chip (SoC) applications like logic/SRAM need shorter fins, whereas in
analog/RF and global interconnect drivers need taller and multi-fins. To tackle this issue, we …

Investigation of short channel effects (SCEs) and analog/RF figure of merits (FOMs) of dual-material bottom-spacer ground-plane (DMBSGP) FinFET

V Narendar, P Narware, V Bheemudu, B Sunitha - Silicon, 2020 - Springer
FinFETs are popular and forefront runner in integrated circuits (ICs) technology due to
exceptional scalability and suppressed short channel effects (SCEs). The bottom spacer …

Design and optimization of dual material gate junctionless FinFET using dimensional effect, gate oxide and workfunction engineering at 7 nm technology node

R Kusuma, VKHR Talari - Silicon, 2022 - Springer
In this paper, we designed and analyzed the performance of Dual Material Gate
Junctionless FinFET (DMG JLFinFET) using gate engineering with high-k dielectrics for …