Shared memory architectures have recently experienced a large increase in thread-level
parallelism, leading to complex memory hierarchies with multiple cache memory levels and …

Recently, research on control and architecture co-design has been drawing increasingly
more attention. This is because these techniques integrate the design of the controllers and …

The map** of tasks to processor cores, called task map**, is crucial to achieving
scalable performance on multicore processors. On modern NUMA (non-uniform memory …

Process placement, also called topology map**, is a well-known strategy to improve
parallel program execution by reducing the communication cost between processes. It …

Low-Level Virtual Machine (LLVM) compiler infrastructure is a useful tool for building just-in-
time (JIT) compilers, besides its reliable front end represented by a clang compiler and its …

Cloud computing is a reality nowadays, however there are few studies trying to understand
what happens in the actual cloud infrastructures for HPC applications. The focus of this study …

HPC systems expose configuration options to assist optimization. Configurations such as
parallelism, thread and data map**, or prefetching have been explored but with a limited …

Optimizing for Non-Uniform Memory Access (NUMA) systems could be considered
inappropriate because hardware architecture aware optimizations are not portable. On the …

Despite NUMA aware optimizations are often considered not portable, this paper states that
extending a compiler, supporting compilation of parallel APIs, with NUMA-aware …

With the widespread use of the multicore systems having smaller transistor sizes, soft errors
become an important issue for parallel program execution. Fault injection is a prevalent …