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Dynamic cache reconfiguration and partitioning for energy optimization in real-time multi-core systems
Multicore architectures, especially chip multi-processors, have been widely acknowledged
as a successful design paradigm. Existing approaches primarily target application-driven …
as a successful design paradigm. Existing approaches primarily target application-driven …
A fully static true-single-phase-clocked dual-edge-triggered flip-flop for near-threshold voltage operation in IoT applications
A Dual-Edge-Triggered (DET) flip-flop (FF) that can reliably operate at low voltage is
proposed in this paper. Unlike the conventional Single-Edge-Triggered (SET) flip-flops, DET …
proposed in this paper. Unlike the conventional Single-Edge-Triggered (SET) flip-flops, DET …
Reuse of off-the-shelf components in C2-style architectures
Reuse of large-grain software components offers the potential for significant savings in
application development cost and time. Successful comuonent reuse and substitutability …
application development cost and time. Successful comuonent reuse and substitutability …
Integrated power management for battery-indifferent systems with ultra-wide adaptation down to nW
This article presents a power management unit (PMU) enabling ultra-wide power-
performance tradeoff well beyond voltage scaling, and adaptation to the sensed …
performance tradeoff well beyond voltage scaling, and adaptation to the sensed …
Hopscotch: A hardware-software co-design for efficient cache resizing on multi-core SoCs
Following the trend of increasing autonomy in real-time systems, multi-core System-on-
Chips (SoCs) have enabled devices to better handle the large streams of data and intensive …
Chips (SoCs) have enabled devices to better handle the large streams of data and intensive …
A multi-version approach to conflict resolution in distributed groupware systems
Groupware systems are a special class of distributed computing systems which support
human-computer-human interaction. Real-time collaborative graphics editors allow a group …
human-computer-human interaction. Real-time collaborative graphics editors allow a group …
Optimization-based power and thermal management for dark silicon aware 3D chip multiprocessors using heterogeneous cache hierarchy
Management of a problem recently known as “dark silicon” is a new challenge in multicore
designs. Prior innovative studies have addressed the dark silicon problem in the fields of …
designs. Prior innovative studies have addressed the dark silicon problem in the fields of …
Efficient cache reconfiguration using machine learning in NoC-based many-core CMPs
Dynamic cache reconfiguration (DCR) is an effective technique to optimize energy
consumption in many-core architectures. While early work on DCR has shown promising …
consumption in many-core architectures. While early work on DCR has shown promising …
Dynamically adaptable pipeline for energy-efficient microarchitectures under wide voltage scaling
This paper introduces dynamically adaptable pipelines to enable microarchitecture-driven
voltage scaling, adapting the microarchitecture to the most energy-efficient configuration for …
voltage scaling, adapting the microarchitecture to the most energy-efficient configuration for …
Cache reconfiguration using machine learning for vulnerability-aware energy optimization
Dynamic cache reconfiguration has been widely explored for energy optimization and
performance improvement for single-core systems. Cache partitioning techniques are …
performance improvement for single-core systems. Cache partitioning techniques are …