Recent thermal management techniques for microprocessors

J Kong, SW Chung, K Skadron - ACM Computing Surveys (CSUR), 2012 - dl.acm.org
Microprocessor design has recently encountered many constraints such as power, energy,
reliability, and temperature. Among these challenging issues, temperature-related issues …

Thermal-aware scheduling in green data centers

MT Chaudhry, TC Ling, A Manzoor… - ACM Computing …, 2015 - dl.acm.org
Data centers can go green by saving electricity in two major areas: computing and cooling.
Servers in data centers require a constant supply of cold air from on-site cooling …

Dynamic thermal management in 3D multicore architectures

AK Coskun, JL Ayala, D Atienza… - … , Automation & Test …, 2009 - ieeexplore.ieee.org
Technology scaling has caused the feature sizes to shrink continuously, whereas
interconnects, unlike transistors, have not followed the same trend. Designing 3D stack …

Optimizing energy efficiency of 3-D multicore systems with stacked DRAM under power and thermal constraints

J Meng, K Kawakami, AK Coskun - Proceedings of the 49th Annual …, 2012 - dl.acm.org
3D multicore systems with stacked DRAM have the potential to boost system performance
significantly; however, this performance increase may cause 3D systems to exceed the …

Traffic-and thermal-aware run-time thermal management scheme for 3D NoC systems

CH Chao, KY Jheng, HY Wang… - 2010 Fourth ACM …, 2010 - ieeexplore.ieee.org
Three-dimensional network-on-chip (3D NoC), the combination of NoC and die-stacking 3D
IC technology, is motivated to achieve lower latency, lower power consumption, and higher …

Analysis of critical thermal issues in 3D integrated circuits

F Tavakkoli, S Ebrahimi, S Wang, K Vafai - International Journal of Heat …, 2016 - Elsevier
Several key attributes of a 3D integrated chip structure are analyzed in this work. Critical
features related to the effect of the size of the substrate, heat sink, device layer, through …

Thermal TSV optimization and hierarchical floorplanning for 3-D integrated circuits

Z Ren, A Alqahtani, N Bagherzadeh… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
While 3-D integrated circuits (ICs) offer many advantages over 2-D ICs, thermal
management challenges remain unresolved. Thermal through-silicon-vias (TTSVs) are …

Thermal-aware task scheduling in 3D chip multiprocessor with real-time constrained workloads

J Li, M Qiu, JW Niu, LT Yang, Y Zhu… - ACM Transactions on …, 2013 - dl.acm.org
Chip multiprocessor (CMP) techniques have been implemented in embedded systems due
to tremendous computation requirements. Three-dimension (3D) CMP architecture has been …

Throughput maximization for periodic real-time systems under the maximal temperature constraint

H Huang, V Chaturvedi, G Quan, J Fan… - ACM Transactions on …, 2014 - dl.acm.org
In this article, we study the problem of how to maximize the throughput of a periodic real-time
system under a given peak temperature constraint. We assume that different tasks in our …

Improved thermal tracking for processors using hard and soft sensor allocation techniques

S Reda, R Cochran, AN Nowroz - IEEE Transactions on …, 2011 - ieeexplore.ieee.org
Hot spots are a major concern in high-end processors as they constrain performance and
limit the lifetime of semiconductor chips. Using embedded thermal sensors, dynamic thermal …