Top-Down VLSI Design: From Architectures to Gate-Level Circuits and FPGAs represents a
unique approach to learning digital design. Developed from more than 20 years teaching …

Further power and energy reductions via technology and voltage scaling have become
extremely difficult due to leakage and variability issues. In this paper, we present a robust …

The energy usage of on-chip interconnects is a concern for many system-on-chips targeting
portable battery-powered devices. We have designed and evaluated a network-on-chip …

The communication subsystem of a system-on-chip (SoC) has been an exciting research
area for more than three decades. With benefits ranging from increased power efficiency to …

Power consumption of on-chip interconnects is a primary concern for many embedded
system-on-chip (SoC) applications. In this paper, we compare energy and performance …

We present a novel computational framework that connects Blue Waters, the NSF-
supported, leadership-class supercomputer operated by NCSA, to the Laser Interferometer …

Asynchronous handshake protocol communication is accomplished by sending data down a
communication link coupled with data validity information. Flow control is established by …

This paper presents a statistical framework to analyze the performance of CMOS digital
circuit in the presence of process variations considering a variety of timing methodologies …

Asynchronous circuits exhibit impressive power and performance benefits over its
synchronous counterpart. Asynchronous system design, however, is not widely adopted due …

This brief proposes a new type of high throughput asynchronous pipeline structure called
self-precharging (SP) pipeline. The proposed SP pipeline targets dynamic linear datapaths …