A survey of machine learning for computer architecture and systems

N Wu, Y **s: enabling efficient algorithm-accelerator map** space search
K Hegde, PA Tsai, S Huang, V Chandra… - Proceedings of the 26th …, 2021 - dl.acm.org
Modern day computing increasingly relies on specialization to satiate growing performance
and efficiency requirements. A core challenge in designing such specialized hardware …

BOOM-Explorer: RISC-V BOOM microarchitecture design space exploration framework

C Bai, Q Sun, J Zhai, Y Ma, B Yu… - 2021 IEEE/ACM …, 2021 - ieeexplore.ieee.org
The microarchitecture design of a processor has been increasingly difficult due to the large
design space and time-consuming verification flow. Previously, researchers rely on prior …

Cross-architecture performance prediction (XAPP) using CPU code to predict GPU performance

N Ardalani, C Lestourgeon, K Sankaralingam… - Proceedings of the 48th …, 2015 - dl.acm.org
GPUs have become prevalent and more general purpose, but GPU programming remains
challenging and time consuming for the majority of programmers. In addition, it is not always …

Methods of inference and learning for performance modeling of parallel applications

BC Lee, DM Brooks, BR de Supinski, M Schulz… - Proceedings of the 12th …, 2007 - dl.acm.org
Increasing system and algorithmic complexity combined with a growing number of tunable
application parameters pose significant challenges for analytical performance modeling. We …

Energy-performance tradeoffs in processor architecture and circuit design: a marginal cost analysis

O Azizi, A Mahesri, BC Lee, SJ Patel… - ACM SIGARCH …, 2010 - dl.acm.org
Power consumption has become a major constraint in the design of processors today. To
optimize a processor for energy-efficiency requires an examination of energy-performance …

ArchExplorer: Microarchitecture exploration via bottleneck analysis

C Bai, J Huang, X Wei, Y Ma, S Li, H Zheng… - Proceedings of the 56th …, 2023 - dl.acm.org
Design space exploration (DSE) for microarchitecture parameters is an essential stage in
microprocessor design to explore the trade-offs among performance, power, and area …

Jigsaw: Scalable software-defined caches

N Beckmann, D Sanchez - Proceedings of the 22nd …, 2013 - ieeexplore.ieee.org
Shared last-level caches, widely used in chip-multi-processors (CMPs), face two
fundamental limitations. First, the latency and energy of shared caches degrade as the …

Stargazer: Automated regression-based GPU design space exploration

W Jia, KA Shaw, M Martonosi - 2012 IEEE International …, 2012 - ieeexplore.ieee.org
Graphics processing units (GPUs) are of increasing interest because they offer massive
parallelism for high-throughput computing. While GPUs promise high peak performance …

Application performance modeling in a virtualized environment

S Kundu, R Rangaswami, K Dutta… - HPCA-16 2010 The …, 2010 - ieeexplore.ieee.org
Performance models provide the ability to predict application performance for a given set of
hardware resources and are used for capacity planning and resource management …