Review of semiconductor flash memory devices for material and process issues

SS Kim, SK Yong, W Kim, S Kang, HW Park… - Advanced …, 2023 - Wiley Online Library
Abstract Vertically integrated NAND (V‐NAND) flash memory is the main data storage in
modern handheld electronic devices, widening its share even in the data centers where …

Highly-scaled and fully-integrated 3-dimensional ferroelectric transistor array for hardware implementation of neural networks

IJ Kim, MK Kim, JS Lee - Nature Communications, 2023 - nature.com
Hardware-based neural networks (NNs) can provide a significant breakthrough in artificial
intelligence applications due to their ability to extract features from unstructured data and …

The role of polymers in halide perovskite resistive switching devices

GSH Thien, KY Chan, AR Marlinda - Polymers, 2023 - mdpi.com
Currently, halide perovskites (HPs) are gaining traction in multiple applications, such as
photovoltaics and resistive switching (RS) devices. In RS devices, the high electrical …

Vertical ferroelectric thin-film transistor array with a 10-nm gate length for high-density three-dimensional memory applications

IJ Kim, MK Kim, JS Lee - Applied Physics Letters, 2022 - pubs.aip.org
Hafnia-based ferroelectric thin-film transistors (FeTFTs) are regarded as promising
candidates for future nonvolatile memory devices owing to their low power consumption …

Low power consumption nanofilamentary ECM and VCM cells in a single sidewall of high‐density VRRAM arrays

MC Wu, YH Ting, JY Chen, WW Wu - Advanced Science, 2019 - Wiley Online Library
The technologies of 3D vertical architecture have made a major breakthrough in
establishing high‐density memory structures. Combined with an array structure, a 3D high …

3-D stacked synapse array based on charge-trap flash memory for implementation of deep neural networks

YJ Park, HT Kwon, B Kim, WJ Lee… - … on Electron Devices, 2018 - ieeexplore.ieee.org
This paper proposes a synaptic device based on charge-trap flash memory that has good
CMOS compatibility and superior reliability characteristics compared with other synaptic …

3-D synapse array architecture based on charge-trap flash memory for neuromorphic application

HS Choi, YJ Park, JH Lee, Y Kim - Electronics, 2019 - mdpi.com
In order to address a fundamental bottleneck of conventional digital computers, there is
recently a tremendous upsurge of investigations on hardware-based neuromorphic systems …

Ferroelectric polarization aided low voltage operation of 3D NAND flash memories

I Ham, Y Jeong, SJ Baik, M Kang - Electronics, 2020 - mdpi.com
In this paper, we proposed a novel structure enabling the low voltage operation of three-
dimensional (3D) NAND flash memory. The proposed structure has a ferroelectric thin film …

Exploring Disturb Characteristics in 2D and 3D Ferroelectric NAND Memory Arrays for Next-Generation Memory Technology

IJ Kim, J Choi, JS Lee - ACS Applied Materials & Interfaces, 2024 - ACS Publications
Ferroelectric transistors are considered promising for next-generation 3D NAND technology
due to their lower power consumption and faster operation compared to conventional …

A new read scheme for alleviating cell-to-cell interference in scaled-down 3D NAND flash memory

JM Sim, M Kang, YH Song - Electronics, 2020 - mdpi.com
In this paper, we investigated the cell-to-cell interference in scaled-down 3D NAND flash
memory by using a Technology Computer-Aided Design (TCAD) simulation. The …