A full spectrum of computing-in-memory technologies

Z Sun, S Kvatinsky, X Si, A Mehonic, Y Cai… - Nature Electronics, 2023 - nature.com
Computing in memory (CIM) could be used to overcome the von Neumann bottleneck and to
provide sustainable improvements in computing throughput and energy efficiency …

Neuro-inspired computing with emerging nonvolatile memorys

S Yu - Proceedings of the IEEE, 2018 - ieeexplore.ieee.org
This comprehensive review summarizes state of the art, challenges, and prospects of the
neuro-inspired computing with emerging nonvolatile memory devices. First, we discuss the …

PUMA: A programmable ultra-efficient memristor-based accelerator for machine learning inference

A Ankit, IE Hajj, SR Chalamalasetti, G Ndu… - Proceedings of the …, 2019 - dl.acm.org
Memristor crossbars are circuits capable of performing analog matrix-vector multiplications,
overcoming the fundamental energy efficiency limitations of digital logic. They have been …

Prime: A novel processing-in-memory architecture for neural network computation in reram-based main memory

P Chi, S Li, C Xu, T Zhang, J Zhao, Y Liu… - ACM SIGARCH …, 2016 - dl.acm.org
Processing-in-memory (PIM) is a promising solution to address the" memory wall"
challenges for future computer systems. Prior proposed PIM architectures put additional …

NeuroSim: A circuit-level macro model for benchmarking neuro-inspired architectures in online learning

PY Chen, X Peng, S Yu - IEEE Transactions on Computer …, 2018 - ieeexplore.ieee.org
Neuro-inspired architectures based on synaptic memory arrays have been proposed for on-
chip acceleration of weighted sum and weight update in machine/deep learning algorithms …

[HTML][HTML] Analog architectures for neural network acceleration based on non-volatile memory

TP **ao, CH Bennett, B Feinberg, S Agarwal… - Applied Physics …, 2020 - pubs.aip.org
Analog hardware accelerators, which perform computation within a dense memory array,
have the potential to overcome the major bottlenecks faced by digital hardware for data …

A survey of accelerator architectures for deep neural networks

Y Chen, Y **e, L Song, F Chen, T Tang - Engineering, 2020 - Elsevier
Recently, due to the availability of big data and the rapid growth of computing power,
artificial intelligence (AI) has regained tremendous attention and investment. Machine …

Dot-product engine for neuromorphic computing: Programming 1T1M crossbar to accelerate matrix-vector multiplication

M Hu, JP Strachan, Z Li, EM Grafals, N Davila… - Proceedings of the 53rd …, 2016 - dl.acm.org
Vector-matrix multiplication dominates the computation time and energy for many workloads,
particularly neural network algorithms and linear transforms (eg, the Discrete Fourier …

GraphR: Accelerating graph processing using ReRAM

L Song, Y Zhuo, X Qian, H Li… - 2018 IEEE International …, 2018 - ieeexplore.ieee.org
Graph processing recently received intensive interests in light of a wide range of needs to
understand relationships. It is well-known for the poor locality and high memory bandwidth …

Memristor crossbar-based neuromorphic computing system: A case study

M Hu, H Li, Y Chen, Q Wu, GS Rose… - IEEE transactions on …, 2014 - ieeexplore.ieee.org
By mimicking the highly parallel biological systems, neuromorphic hardware provides the
capability of information processing within a compact and energy-efficient platform …