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Hardware trust and assurance through reverse engineering: A tutorial and outlook from image analysis and machine learning perspectives
In the context of hardware trust and assurance, reverse engineering has been often
considered as an illegal action. Generally speaking, reverse engineering aims to retrieve …
considered as an illegal action. Generally speaking, reverse engineering aims to retrieve …
ASSURE: RTL locking against an untrusted foundry
Semiconductor design companies are integrating proprietary intellectual property (IP) blocks
to build custom integrated circuits (ICs) and fabricate them in a third-party foundry …
to build custom integrated circuits (ICs) and fabricate them in a third-party foundry …
Exploring eFPGA-based redaction for IP protection
Recently, eFPGA-based redaction has been proposed as a promising solution for hiding
parts of a digital design from untrusted entities, where legitimate end-users can restore …
parts of a digital design from untrusted entities, where legitimate end-users can restore …
High-level approaches to hardware security: A tutorial
Designers use third-party intellectual property (IP) cores and outsource various steps in the
integrated circuit (IC) design and manufacturing flow. As a result, security vulnerabilities …
integrated circuit (IC) design and manufacturing flow. As a result, security vulnerabilities …
SAIL: Analyzing structural artifacts of logic locking using machine learning
Obfuscation or Logic locking (LL) is a technique for protecting hardware intellectual property
(IP) blocks against diverse threats, including IP theft, reverse engineering, and malicious …
(IP) blocks against diverse threats, including IP theft, reverse engineering, and malicious …
AdaTest: Reinforcement learning and adaptive sampling for on-chip hardware Trojan detection
This paper proposes AdaTest, a novel adaptive test pattern generation framework for
efficient and reliable Hardware Trojan (HT) detection. HT is a backdoor attack that tampers …
efficient and reliable Hardware Trojan (HT) detection. HT is a backdoor attack that tampers …
Benchmarking of soc-level hardware vulnerabilities: A complete walkthrough
Due to the increasing complexity of modern system-on-chips (SoCs) and the diversity of the
attack surface, popular SoC verification approaches used in industry and academia for …
attack surface, popular SoC verification approaches used in industry and academia for …
Not all fabrics are created equal: Exploring eFPGA parameters for IP redaction
Semiconductor design houses rely on third-party foundries to manufacture their integrated
circuits (ICs). While this trend allows them to tackle fabrication costs, it introduces security …
circuits (ICs). While this trend allows them to tackle fabrication costs, it introduces security …
A survey and perspective on artificial intelligence for security-aware electronic design automation
Artificial intelligence (AI) and machine learning (ML) techniques have been increasingly
used in several fields to improve performance and the level of automation. In recent years …
used in several fields to improve performance and the level of automation. In recent years …
ALICE: An automatic design flow for eFPGA redaction
Fabricating an integrated circuit is becoming unaffordable for many semiconductor design
houses. Outsourcing the fabrication to a third-party foundry requires methods to protect the …
houses. Outsourcing the fabrication to a third-party foundry requires methods to protect the …