[HTML][HTML] Design of hardware efficient FIR filter: A review of the state-of-the-art approaches
Digital signal processing (DSP) is one of the most powerful technologies which will shape
the science, engineering and technology of the twenty-first century. Since 1970 …
the science, engineering and technology of the twenty-first century. Since 1970 …
[BOOK][B] Design for embedded image processing on FPGAs
DG Bailey - 2023 - books.google.com
Design for Embedded Image Processing on FPGAs Bridge the gap between software and
hardware with this foundational design reference Field-programmable gate arrays (FPGAs) …
hardware with this foundational design reference Field-programmable gate arrays (FPGAs) …
New reconfigurable architectures for implementing FIR filters with low complexity
Reconfigurability and low complexity are the two key requirements of finite impulse
response (FIR) filters employed in multistandard wireless communication systems. In this …
response (FIR) filters employed in multistandard wireless communication systems. In this …
A new common subexpression elimination algorithm for realizing low-complexity higher order digital filters
The complexity of linear-phase finite-impulse-response (FIR) filters is dominated by the
complexity of coefficient multipliers. The number of adders (subtractors) used to implement …
complexity of coefficient multipliers. The number of adders (subtractors) used to implement …
Lower bounds for constant multiplication problems
O Gustafsson - IEEE Transactions on Circuits and Systems II …, 2007 - ieeexplore.ieee.org
Lower Bounds for Constant Multiplication Problems Page 1 974 IEEE TRANSACTIONS ON
CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 54, NO. 11, NOVEMBER 2007 Lower …
CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 54, NO. 11, NOVEMBER 2007 Lower …
A novel common-subexpression-elimination method for synthesizing fixed-point FIR filters
CY Yao, HH Chen, TF Lin, CJ Chien… - IEEE Transactions on …, 2004 - ieeexplore.ieee.org
We propose a common-subexpression-elimination (CSE) method for the synthesis of fixed-
point finite-impulse response (FIR) filters. The proposed CSE algorithm considers both the …
point finite-impulse response (FIR) filters. The proposed CSE algorithm considers both the …
Low-cost FIR filter designs based on faithfully rounded truncated multiple constant multiplication/accumulation
SF Hsiao, JHZ Jian, MC Chen - IEEE Transactions on Circuits …, 2013 - ieeexplore.ieee.org
Low-cost finite impulse response (FIR) designs are presented using the concept of faithfully
rounded truncated multipliers. We jointly consider the optimization of bit width and hardware …
rounded truncated multipliers. We jointly consider the optimization of bit width and hardware …
Some optimizations of hardware multiplication by constant matrices
N Boullis, A Tisserand - IEEE Transactions on Computers, 2005 - ieeexplore.ieee.org
This paper presents some improvements on the optimization of hardware multiplication by
constant matrices. We focus on the automatic generation of circuits that involve constant …
constant matrices. We focus on the automatic generation of circuits that involve constant …
Design of linear phase FIR filters in subexpression space using mixed integer linear programming
YJ Yu, YC Lim - IEEE Transactions on Circuits and Systems I …, 2007 - ieeexplore.ieee.org
In this paper, a novel optimization technique is proposed to optimize filter coefficients of
linear phase finite-impulse response (FIR) filter to share common subexpressions within and …
linear phase finite-impulse response (FIR) filter to share common subexpressions within and …
Information theoretic approach to complexity reduction of FIR filter design
This paper presents a new paradigm of design methodology to reduce the complexity of
application-specific finite-impulse response (FIR) digital filters. A new adder graph data …
application-specific finite-impulse response (FIR) digital filters. A new adder graph data …