Agile SoC development with open ESP

P Mantovani, D Giri, G Di Guglielmo… - Proceedings of the 39th …, 2020 - dl.acm.org
ESP is an open-source research platform for heterogeneous SoC design. The platform
combines a modular tile-based architecture with a variety of application-oriented flows for …

Does soc hardware development become agile by saying so: A literature review and map** study

A Rautakoura, T Hämäläinen - ACM transactions on embedded …, 2023 - dl.acm.org
The success of agile development methods in software development has raised interest in
System-on-Chip (SoC) design, which involves high architectural and development process …

SMAPPIC: Scalable multi-FPGA architecture prototype platform in the cloud

G Chirkov, D Wentzlaff - Proceedings of the 28th ACM International …, 2023 - dl.acm.org
Traditionally, architecture prototypes are built on top of FPGA infrastructure, with two
associated problems. First, very large FPGAs are prohibitively expensive for most people …

Seizing the bandwidth scaling of on-package interconnect in a post-Moore's law world

G Chirkov, D Wentzlaff - … of the 37th International Conference on …, 2023 - dl.acm.org
The slowing and forecasted end of Moore's Law have forced designers to look beyond
simply adding transistors, encouraging them to employ other unused resources as a manner …

Herov2: Full-stack open-source research platform for heterogeneous computing

A Kurth, B Forsberg, L Benini - IEEE Transactions on Parallel …, 2022 - ieeexplore.ieee.org
Heterogeneous computers integrate general-purpose host processors with domain-specific
accelerators to combine versatility with efficiency and high performance. To realize the full …

Your agile open source hw stinks (because it is not a system)

MB Taylor - Proceedings of the 39th International Conference on …, 2020 - dl.acm.org
Exciting times in hardware design are upon us. Spearheaded by the RISC-V ISA, and the
recent DARPA POSH/IDEA program which focuses on both open source IP and open source …

A Prototype-Based Framework to Design Scalable Heterogeneous SoCs with Fine-Grained DFS

G Montanaro, A Galimberti… - 2024 IEEE 42nd …, 2024 - ieeexplore.ieee.org
Frameworks for the agile development of modern system-on-chips are crucial to dealing with
the complexity of de-signing such architectures. The open-source Vespa framework for …

Hardroid: Transparent integration of crypto accelerators in android

L Piccolboni, G Di Guglielmo… - 2021 IEEE High …, 2021 - ieeexplore.ieee.org
Accelerators have become fundamental building blocks of any modern architecture.
Accelerators are often deployed on a platform by evaluating performance and energy …

RIVL: A Low-Cost SoC Agile Development Platform for Multiple RISC-V Processors Design and Verification

L Xu, Z Cao, H Zhao, Z Peng, Y Miao… - … on Circuits and …, 2024 - ieeexplore.ieee.org
Current processor chip designs are mainly oriented by performance, power and area (PPA),
and developed using the waterfall model. However, there are two main challenges in this …

Scratchy: A Class of Adaptable Architectures with Software-Managed Communication for Edge Streaming Applications

JW Faye, N Haggui, F Kermarrec, KJM Martin… - … Workshop on Design …, 2024 - Springer
Stream processing applications are becoming increasingly complex, requiring parallel and
adaptable architectures under real-time constraints. Currently, selecting appropriate …