An improved junction termination design using deep trenches for superjunction power devices

High aspect ratio deep trench termination (HARDT2) technique surrounding die edge as dielectric wall to improve high voltage device area efficiency

T Yamaguchi, H Okumura, T Shiraishi… - … Devices and IC's …, 2017 - ieeexplore.ieee.org
In high voltage power devices, to improve an active device area efficiency, a new edge
termination structure that applying high aspect ratio deep trench termination technique is …
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Simulation study of a deep-trench LDMOS with bilateral super-junction drift regions

JJ Cheng, P Li, WZ Chen, B Yi… - 2018 41st International …, 2018 - ieeexplore.ieee.org
An improved structure of the Deep-Trench Lateral Double-diffused Metal-Oxide-
Semiconductor transistor (DT-LDMOS) is proposed and studied. The most improvement is …
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