A survey of machine learning applied to computer architecture design
DD Penney, L Chen - arxiv preprint arxiv:1909.12373, 2019 - arxiv.org
Machine learning has enabled significant benefits in diverse fields, but, with a few
exceptions, has had limited impact on computer architecture. Recent work, however, has …
exceptions, has had limited impact on computer architecture. Recent work, however, has …
Demystifying soft error assessment strategies on arm cpus: Microarchitectural fault injection vs. neutron beam experiments
A Chatzidimitriou, P Bodmann… - 2019 49th Annual …, 2019 - ieeexplore.ieee.org
Fault injection in early microarchitecture-level simulation CPU models and beam
experiments on the final physical CPU chip are two established methodologies to access the …
experiments on the final physical CPU chip are two established methodologies to access the …
Multi-bit upsets vulnerability analysis of modern microprocessors
Miniaturization of integrated circuits brings more devices (thus more functionality) on the
same silicon area but also makes them more vulnerable to soft (transient) errors …
same silicon area but also makes them more vulnerable to soft (transient) errors …
Demystifying and mitigating cross-layer deficiencies of soft error protection in instruction duplication
Soft errors are prevalent in modern High-Performance Computing (HPC) systems, resulting
in silent data corruptions (SDCs), compromising system reliability. Instruction duplication is a …
in silent data corruptions (SDCs), compromising system reliability. Instruction duplication is a …
Syra: Early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems
Cross-layer reliability is becoming the preferred solution when reliability is a concern in the
design of a microprocessor-based system. Nevertheless, deciding how to distribute the error …
design of a microprocessor-based system. Nevertheless, deciding how to distribute the error …
Studying error propagation on application data structure and hardware
As technology scales, transistors become smaller and aggressive power optimization
techniques combined with high operation frequencies and performance-enhancing …
techniques combined with high operation frequencies and performance-enhancing …
Beyond structural test, the rising need for system-level test
HH Chen - 2018 International Symposium on VLSI Design …, 2018 - ieeexplore.ieee.org
The steady march of Moore's Law in semiconductors has enabled the creation of ever more
complex systems with electronics playing a central role. As a result, thorough testing of …
complex systems with electronics playing a central role. As a result, thorough testing of …
Redo: Cross-layer multi-objective design-exploration framework for efficient soft error resilient systems
Designing soft errors resilient systems is a complex engineering task, which nowadays
follows a cross-layer approach. It requires a careful planning for different fault-tolerance …
follows a cross-layer approach. It requires a careful planning for different fault-tolerance …
Rt level vs. microarchitecture-level reliability assessment: Case study on arm (r) cortex (r)-a9 cpu
Reliability assessment has always been a major concern in the design of computing
systems. The results of the assessment highlight and guide enhancements which trigger …
systems. The results of the assessment highlight and guide enhancements which trigger …
Design, manufacturing and performance test of a solar tracker made by a embedded control
CD Garcia-Beltran - Electronics, robotics and automotive …, 2007 - ieeexplore.ieee.org
This paper presents all the stages of development of a solar tracker for a photovoltaic panel.
The system was made with a microcontroller which was design as an embedded control. It …
The system was made with a microcontroller which was design as an embedded control. It …