A survey on compiler autotuning using machine learning
Since the mid-1990s, researchers have been trying to use machine-learning-based
approaches to solve a number of different compiler optimization problems. These …
approaches to solve a number of different compiler optimization problems. These …
Factory communications at the dawn of the fourth industrial revolution
The fourth industrial revolution (Industry 4.0) and its requirements impose radical changes to
the underlying networking technologies that will be adopted in future factories. Most popular …
the underlying networking technologies that will be adopted in future factories. Most popular …
An evolutionary technique for performance-energy-temperature optimized scheduling of parallel tasks on multi-core processors
This paper proposes a multi-objective evolutionary algorithm (MOEA)-based task scheduling
approach for determining Pareto optimal solutions with simultaneous optimization of …
approach for determining Pareto optimal solutions with simultaneous optimization of …
Cobayn: Compiler autotuning framework using bayesian networks
The variety of today's architectures forces programmers to spend a great deal of time porting
and tuning application codes across different platforms. Compilers themselves need …
and tuning application codes across different platforms. Compilers themselves need …
Respir: A response surface-based pareto iterative refinement for application-specific design space exploration
Application-specific multiprocessor systems-on-chip (MPSoCs) are usually designed by
using a platform-based approach, where a wide range of customizable parameters can be …
using a platform-based approach, where a wide range of customizable parameters can be …
Dypo: Dynamic pareto-optimal configuration selection for heterogeneous mpsocs
Modern multiprocessor systems-on-chip (MpSoCs) offer tremendous power and
performance optimization opportunities by tuning thousands of potential voltage, frequency …
performance optimization opportunities by tuning thousands of potential voltage, frequency …
Accelerating throughput-aware runtime map** for heterogeneous MPSoCs
Modern embedded systems need to support multiple time-constrained multimedia
applications that often employ multiprocessor-systems-on-chip (MPSoCs). Such systems …
applications that often employ multiprocessor-systems-on-chip (MPSoCs). Such systems …
Decision-theoretic design space exploration of multiprocessor platforms
G Beltrame, L Fossati, D Sciuto - IEEE Transactions on …, 2010 - ieeexplore.ieee.org
This paper presents an efficient technique to perform design space exploration of a
multiprocessor platform that minimizes the number of simulations needed to identify a Pareto …
multiprocessor platform that minimizes the number of simulations needed to identify a Pareto …
Model-driven design-space exploration for embedded systems: The octopus toolset
T Basten, E Van Benthum, M Geilen… - … Applications of Formal …, 2010 - Springer
The complexity of today's embedded systems and their development trajectories requires a
systematic, model-driven design approach, supported by tooling wherever possible. Only …
systematic, model-driven design approach, supported by tooling wherever possible. Only …
OSCAR: An optimization methodology exploiting spatial correlation in multicore design spaces
This paper presents OSCAR, an optimization methodology exploiting spatial correlation of
multicore design spaces. This paper builds upon the observation that power consumption …
multicore design spaces. This paper builds upon the observation that power consumption …