Graphics Processing Units (GPUs) utilize memory hierarchy and Thread-Level Parallelism
(TLP) to tolerate off-chip memory latency, which is a significant bottleneck for memory-bound …

As robots increasingly permeate modern society, it is crucial for the system and hardware
research community to bridge its long-standing gap with robotics. This divide has persisted …

Graphics Processing Units (GPUs) are widely-used accelerators for data-parallel
applications. In many GPU applications, GPU memory bandwidth bottlenecks performance …

Graphics Processing Units (GPUs) are the accelerator of choice in a variety of application
domains, because they can accelerate massively parallel workloads and can be easily …

This paper presents Tartan, a CPU architecture designed for a wide range of robotic
applications. Tartan provides architectural support for common robotic kernels, ensuring its …

Slightly off-axis digital holography is proposed using transmission grating to obtain
quantitative phase distribution. The experimental device is based on an improved 4f optical …

While designed for massive parallelism, GPUs are frequently suffering from low thread
occupancy and limited data throughput, which are typically attributed to constrained on-chip …

Background: Time-series biosignal data, representative of a physiological process, is often
applied to time-sensitive machine learning applications that benefit from acceleration …

A scalable bandwidth-adaptive on-chip storage network architecture is proposed to address
the severe data conflict and low bus parallelism in existing multi-level storage, Crossbar …

Single Instruction Multiple Thread (SIMT) based processor and parallel model are effective
ways to solve computation problems exist in big data era. Commonly, work load is organized …