This paper presents an overview of the rapid progress being made in the development of
InP based devices for high speed applications. Over the past few decades, major aero …

In this work, we will give an overview of the innovations in materials and new device
concepts that will be needed to continue Moore's law to the sub-10 nm technology nodes. To …

Si-based integrated circuits have been intensively developed over the past several decades
through ultimate device scaling. However, the Si technology has reached the physical …

CMOS utilizing high mobility III-V/Ge channels on Si substrates is expected to be one of the
promising devices for high performance and low power integrated systems in the future …

Recently, sub-10-nm-diameter InGaAs vertical nanowire (VNW) MOSFETs have been
demonstrated. The key to this achievement was the use of Ni for the top ohmic contact. In …

In this paper we present a 55 nm gate length In 0.53 Ga 0.47 As MOSFET with extrinsic
transconductance of 1.9 mS/μm and on-resistance of 199 Ωμm. The self-aligned MOSFET is …

A method for forming fin field effect transistors includes forming a dielectric layer on a silicon
substrate, forming high aspect ratio trenches in the dielectric layer down to the substrate, the …

Instability of InGaAs channel nMOSFETs with the Al 2 O 3/ZrO 2 gate stack under positive
bias stress demonstrates recoverable and unrecoverable components, which can be …

The electron mobility in Al 2 O 3/InxGa 1-xAs (x= 0.53, 0.65, or 0.75) metal-oxide-
semiconductor field-effect transistors was analyzed for scattering by oxide charge, as well as …

New do** techniques are needed for the formation of abrupt, ultrashallow junctions with
high do** concentration in the source/drain or source/drain extension regions of metal …