Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply
voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in …

The reduction of the supply voltage is standard MOSFETs is impeded by the subthreshold
slope, which cannot be lowered below 60 mV/decade, even in ideal fully-depleted devices …

Steep subthreshold swing transistors based on interband tunneling are examined toward
extending the performance of electronics systems. In particular, this review introduces and …

In this paper, we propose and validate a novel design for a double-gate tunnel field-effect
transistor (DG tunnel FET), for which the simulations show significant improvements …

A formula is derived, which shows that the subthreshold swing of field-effect interband tunnel
transistors is not limited to 60 mV/dec as in the MOSFET. This formula is consistent with two …

The metal oxide semiconductor field effect transistor (MOSFET) is scaling to a “tunneling
epoch”, in which multiple leakage current induced by different tunneling effects exist. The …

In this paper, we present a detailed performance comparison between conventional nin
MOSFET transistors and tunneling field-effect transistors (TFETs) based on the pin …

In this paper, novel n-and p-type tunnel field-effect transistors (T-FETs) based on
heterostructure Si/intrinsic-SiGe channel layer are proposed, which exhibit very small …

Low operating power is an important concern for sub-45-nm CMOS integrated circuits.
Scaling of devices to below 45 nm leads to an increase in active power dissipation (CV 2. f) …

In this paper, we look into the scaling issues of a vertical tunnel field-effect transistor (FET).
The device, a gated pin diode based on silicon, showed gate-controlled band-to-band …