We propose an approach for explaining Bayesian network classifiers, which is based on
compiling such classifiers into decision functions that have a tractable and symbolic form …

Recent work has shown that some common machine learning classifiers can be compiled
into Boolean circuits that have the same input-output behavior. We present a theory for …

Switching Theory for Logic Synthesis covers the basic topics of switching theory and logic
synthesis in fourteen chapters. Chapters 1 through 5 provide the mathematical foundation …

Recent work has shown that the input-output behavior of some common machine learning
classifiers can be captured in symbolic form, allowing one to reason about the behavior of …

A new approach was recently proposed for {\em explaining} the decisions made by
Bayesian network classifiers. This approach is based on first compiling a given classifier (ie …

Deriving a circuit for a Boolean function or improving an available circuit are typical tasks
solved by logic synthesis. Numerous algorithms in this area have been proposed and …

We present an innovative approach to the reactive synthesis of parity automaton
specifications, which plays a pivotal role in the synthesis of linear temporal logic. We find …

Simulation and Boolean satisfiability (SAT) checking are common techniques used in logic
verification. This paper shows how simulation and satisfiability (S&S) can be tightly …

This chapter presents both exact and heuristic two-level logic minimization algorithms. For
exact logic minimization, it shows various techniques to reduce the complexity of covering …

A recursive algorithm for solving Boolean relations is presented. It provides several features:
wide exploration of solutions, parametrizable cost function and efficiency. The experimental …