Neuromorphic electronic circuits for building autonomous cognitive systems

E Chicca, F Stefanini, C Bartolozzi… - Proceedings of the …, 2014 - ieeexplore.ieee.org
Several analog and digital brain-inspired electronic systems have been recently proposed
as dedicated solutions for fast simulations of spiking neural networks. While these …

SpiNNaker: A 1-W 18-core system-on-chip for massively-parallel neural network simulation

E Painkras, LA Plana, J Garside… - IEEE Journal of Solid …, 2013 - ieeexplore.ieee.org
The modelling of large systems of spiking neurons is computationally very demanding in
terms of processing power and communication. SpiNNaker-Spiking Neural Network …

A hierachical configuration system for a massively parallel neural hardware platform

F Galluppi, S Davies, A Rast, T Sharp… - Proceedings of the 9th …, 2012 - dl.acm.org
Simulation of large networks of neurons is a powerful and increasingly prominent
methodology for investigate brain functions and structures. Dedicated parallel hardware is a …

Self-repair in a bidirectionally coupled astrocyte-neuron (AN) system based on retrograde signaling

J Wade, LJ McDaid, J Harkin, V Crunelli… - Frontiers in …, 2012 - frontiersin.org
In this paper we demonstrate that retrograde signaling via astrocytes may underpin self-
repair in the brain. Faults manifest themselves in silent or near silent neurons caused by low …

Multiplexing physical neurons to optimize power and area

RAI Rivera, JV Arthur, AS Cassidy, PA Merolla… - US Patent …, 2015 - Google Patents
Embodiments of the invention relate to a multiplexed neural core circuit. One embodiment
comprises a neural core circuit including a memory device that maintains neuronal attributes …

Consolidating multiple neurosynaptic core circuits into one reconfigurable memory block maintaining neuronal information for the core circuits

FA Akopyan, RAI Rivera, JV Arthur, AS Cassidy… - US Patent …, 2017 - Google Patents
Embodiments of the invention relate to a neural network circuit comprising a memory block
for maintaining neuronal data for multiple neurons, a scheduler for maintaining incoming …

Consolidating multiple neurosynaptic cores into one memory

RAI Rivera, JV Arthur, AS Cassidy, PA Merolla… - US Patent …, 2015 - Google Patents
Embodiments of the invention relate to a neural network system comprising a single memory
block for multiple neurosynaptic core modules. One embodiment comprises a neural …

PyNCS: a microkernel for high-level definition and configuration of neuromorphic electronic systems

F Stefanini, EO Neftci, S Sheik… - Frontiers in …, 2014 - frontiersin.org
Neuromorphic hardware offers an electronic substrate for the realization of asynchronous
event-based sensory-motor systems and large-scale spiking neural network architectures. In …

General hardware multicasting for fine-grained message-passing architectures

M Naylor, SW Moore, D Thomas… - 2021 29th Euromicro …, 2021 - ieeexplore.ieee.org
Manycore architectures are increasingly favouring message-passing or partitioned global
address spaces (PGAS) over cache coherency for reasons of power efficiency and …

Cepstrum based unsupervised spike classification

S Haggag, S Mohamed, A Bhatti, N Gu… - … on Systems, Man …, 2013 - ieeexplore.ieee.org
In this research, we study the effect of feature selection in the spike detection and sorting
accuracy. We introduce a new feature representation for neural spikes from multichannel …