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Hardware accelerated transactional memory system with open nested transactions
J Gray, M Taillefer, Y Levanoni… - US Patent …, 2012 - Google Patents
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disclaimer, the term of this 7,395,382 B1 7, 2008 Moir patent is extended or adjusted under …
disclaimer, the term of this 7,395,382 B1 7, 2008 Moir patent is extended or adjusted under …
Instrumentation of hardware assisted transactional memory system
M Taillefer, J Gray, R Wurdack, G Sheaffer… - US Patent …, 2015 - Google Patents
Monitoring performance of one or more architecturally sig nificant processor caches coupled
to a processor. The meth ods include executing an application on one or more proces sors …
to a processor. The meth ods include executing an application on one or more proces sors …
Extending cache coherency protocols to support locally buffered data
G Sheaffer, S Raikin, V Bassin, R Sade… - US Patent …, 2014 - Google Patents
Zafman LLP (57) ABSTRACT A method and apparatus for extending cache coherency to
hold buffered data to support transactional execution is herein described. A transactional …
hold buffered data to support transactional execution is herein described. A transactional …
System and method for committing results of a software transaction using a hardware transaction
MS Moir, Y Lev, DS Nussbaum - US Patent 8,402,227, 2013 - Google Patents
The system and methods described herein may exploit hard ware transactional memory to
improve the performance of a Software or hybrid transactional memory implementation …
improve the performance of a Software or hybrid transactional memory implementation …
Supporting atomic accumulation with an addressable accumulator
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Program Event Recording Within a Transactional Environment
DF Greiner, C Jacobi, DL Osisek, TJ Slegel - US Patent 9,311,259, 2016 - Google Patents
MeSiti PC (57) ABSTRACT A transaction is initiated within a computing environment, and
based on detecting a program event recording event, an interrupt is presented for the …
based on detecting a program event recording event, an interrupt is presented for the …
Saving/Restoring Selected Registers in Transactional Processing
DF Greiner, C Jacobi, TJ Slegel - US Patent 9,361,115, 2016 - Google Patents
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Metaphysically addressed cache metadata
G Sheaffer, D Callahan, J Gray… - US Patent …, 2013 - Google Patents
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data is implemented in a metadata address space while the storage address, when used for …
data is implemented in a metadata address space while the storage address, when used for …
Restricting processing within a processor to facilitate transaction completion
KJ Alexander, BF Belmar, C Jacobi, RW Philley… - US Patent …, 2016 - Google Patents
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Management of shared transactional resources
FY Busaba, BW Thompto - US Patent 9,483,276, 2016 - Google Patents
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