A survey on agent-based simulation using hardware accelerators
Due to decelerating gains in single-core CPU performance, computationally expensive
simulations are increasingly executed on highly parallel hardware platforms. Agent-based …
simulations are increasingly executed on highly parallel hardware platforms. Agent-based …
Deadlock-free generic routing algorithms for 3-dimensional networks-on-chip with reduced vertical link density topologies
Dimensional Networks-on-Chip (3D NoC) have emerged as the promising solution for
scalability, power consumption and performance demands of next generation Systems-on …
scalability, power consumption and performance demands of next generation Systems-on …
Memory and communication profiling for accelerator-based platforms
The growing demand of processing power is being satisfied mainly by an increase in the
number of homogeneous and heterogeneous computing cores in a system. Efficient …
number of homogeneous and heterogeneous computing cores in a system. Efficient …
A simulation framework for 3-dimension networks-on-chip with different vertical channel density configurations
H Ying, A Jaiswal, MA Abd El Ghany… - 2012 IEEE 15th …, 2012 - ieeexplore.ieee.org
3D ICs are emerging as a promising solution for scalability, power and performance
demands of next generation Systems-on-Chip (SoCs). Along with the advantages, it also …
demands of next generation Systems-on-Chip (SoCs). Along with the advantages, it also …
Memory and communication driven spatio-temporal scheduling on MPSoCs
Scheduling and executing software efficiently on contemporary embedded systems,
featuring heterogeneous multi-processors, multiple power modes, complex memory …
featuring heterogeneous multi-processors, multiple power modes, complex memory …
Memory profiling for intra-application data-communication quantification: A survey
With the advent of technology, multi-core architectures are prevalent in embedded, general-
purpose as well as high-performance computing. Efficient utilization of these platforms in an …
purpose as well as high-performance computing. Efficient utilization of these platforms in an …
Hand posture recognition using shape decomposition
J Choi, JI Park - 2011 IEEE International Symposium on VR …, 2011 - ieeexplore.ieee.org
Hand posture recognition using shape decomposition Page 1 Hand Posture Recognition Using
Shape Decomposition Junyeong Choi* Jong-Il Park† Hanyang University ABSTRACT This paper …
Shape Decomposition Junyeong Choi* Jong-Il Park† Hanyang University ABSTRACT This paper …
SAMOSA: Scratchpad aware map** of streaming applications
Scratchpad memories have now emerged as an alternative to caches for energy constrained
embedded systems. However, effectively map** data on them while considering …
embedded systems. However, effectively map** data on them while considering …
SALAD: Static Analyzer for Loop Acceleration by Exploiting DLP
Y Li, X Li, M Chen, W Zhou, F Deng - Proceedings of the 5th International …, 2021 - dl.acm.org
Data-intensive applications are becoming increasingly popular. However, only a few of them
with high volume can afford dedicated hardware acceleration (such as Neural Network …
with high volume can afford dedicated hardware acceleration (such as Neural Network …
Making communication a first-class citizen in multicore partitioning
Computation-intensive image processing applications need to be implemented on multicore
architectures. If they are to be executed efficiently on such platforms, the underlying data …
architectures. If they are to be executed efficiently on such platforms, the underlying data …