The scaling of complementary metal oxide semiconductor (CMOS) transistors has led to the
silicon dioxide layer used as a gate dielectric becoming so thin that the gate leakage current …

The scaling of complementary metal oxide semiconductor (CMOS) transistors has led to the
silicon dioxide layer used as a gate dielectric becoming so thin (1.4 nm) that its leakage …

The scaling of complementary metal oxide semiconductor transistors has led to the silicon
dioxide layer, used as a gate dielectric, being so thin (1.4 nm) that its leakage current is too …

This article reviews the status, the challenges, and the perspective of 1T-1C dynamic
random access memory (DRAM) chip. The basic principles of the DRAM are presented …

5,801, 105 5,810,923 5,822.256 5,828,080 5,840,897 5,916,365 5,972,847 6,010,969
6,013,553 6,020,024 6,027,961 6,057,271 6,093.944 6,110,529 6,171,900 6,203,613 …

(56) References Cited A method for growing films for use in integrated circuits using atomic
layer deposition and a subsequent converting US PATENT DOCUMENTS step is described …

Metal-Insulator-Metal (MIM) structures have raised as the most promising configuration for
next generation information storage, leading to great performance and fabrication-friendly …

4920, 071 4920, 396 4.948, 937 4,962,879 4987, 089 4,993,358 5.001526 5,006,192
5,017,504 5,021,355 5,028,977 5,032,545 5,080,928 5,089,084 5,097,291 5,102,817 …

The present inventors devised unique atomic-layer deposi tion systems, methods, and
apparatus Suitable for aluminum oxide deposition. One exemplary method entails providing …

(56) References Cited Woessner & Kluth, PA. US PATENT DOCUMENTS(57) ABSTRACT
3,381,114 A 4/1968 Nakanuma.................. 219/385 A method of enhanced atomic layer …