Modern electronics testing has a legacy of more than 40 years. The introduction of new
technologies, especially nanometer technologies with 90nm or smaller geometry, has …

Network-on-chip has recently emerged as alternative communication architecture for
complex system chip and different aspects regarding NoC design have been studied in the …

This work discusses the impact of power consumption on the test time of core-based
systems, when an available on-chip network is reused as test access mechanism. A …

This paper presents an efficient method for online testing of NoC switches. This method
deals with control faults of NoC switches; ie the routing faults which cause NoC packets to …

Networks-on-chip are likely to become the main communication platform of systems-on-chip.
To cope with the growing complexity of the test of such systems, the authors propose the …

On-chip integrated network, the so-called network-on-chip (NoC), is becoming a promising
communication paradigm for the next-generation embedded core-based system chips. The …

This paper presents a BIST strategy for testing the NoC interconnect network, and
investigates if the strategy is a suitable approach for the task. All switches and links in the …

This paper proposes reuse of on-chip networks for testing switches in network on chips
(NoCs). The proposed algorithm broadcasts test vectors of switches through the on-chip …

Network-on-a-chip (NoC) is becoming a promising paradigm of core-based system. We
propose a new method for test scheduling in NoC. The method is based on the use of a …

Testing of Integrated Circuits is important to ensure the production of fault-free chips.
However, testing is becoming cumbersome and expensive due to the increasing complexity …