Analog integrated circuit routing techniques: An extensive review
Routing techniques for analog and radio-frequency (A/RF) integrated circuit (IC) design
automation have been proposed in the literature for over three decades. On those, an …
automation have been proposed in the literature for over three decades. On those, an …
Recent research development and new challenges in analog layout synthesis
Analog and mixed-signal integrated circuits play an important role in many modern
emerging system-on-chip (SoC) design applications. With the expansion of the markets of …
emerging system-on-chip (SoC) design applications. With the expansion of the markets of …
Performance-driven analog layout automation: Current status and future directions
Optimizing circuit performance presents a pivotal challenge in the realm of automatic analog
physical design. The intricacy of analog performance arises from its sensitivity to layout …
physical design. The intricacy of analog performance arises from its sensitivity to layout …
CAD for Analog/Mixed‐Signal Integrated Circuits
While digital integrated circuits (ICs) has adopted highly automated computer aided design
(CAD) tools for decades including synthesis, placement, and routing, analog, and mixed …
(CAD) tools for decades including synthesis, placement, and routing, analog, and mixed …
Non-uniform multilevel analog routing with matching constraints
Symmetry, topology-matching, and length-matching constraints are three major routing
considerations to improve the performance of an analog circuit. Symmetry constraints are …
considerations to improve the performance of an analog circuit. Symmetry constraints are …
A DAG-based algorithm for obstacle-aware topology-matching on-track bus routing
As clock frequencies increase, topology-matching bus routing is desired to provide an initial
routing result which facilitates the following buffer insertion to meet the timing constraints …
routing result which facilitates the following buffer insertion to meet the timing constraints …
Low power robust FinFET-based SRAM design in scaled technologies
FinFETs have emerged as alternatives to conventional bulk MOSFETs in scaled
technologies due to superior gate control of the channel, lower short channel effects and …
technologies due to superior gate control of the channel, lower short channel effects and …
A fast prototy** framework for analog layout migration with planar preservation
Analog layout generation in the advanced CMOS design is challenging by its increasing
layout constraints and performance requirements. This situation becomes more intricate by …
layout constraints and performance requirements. This situation becomes more intricate by …
Configurable analog routing methodology via technology and design constraint unification
In this paper, we present a novel configurable analog routing methodology for more efficient
analog layout automation. By the help of OpenAccess constraint group format, the …
analog layout automation. By the help of OpenAccess constraint group format, the …
A pre-search assisted ILP approach to analog integrated circuit routing
CY Wu, H Graeb, J Hu - 2015 33rd IEEE International …, 2015 - ieeexplore.ieee.org
The routing of analog integrated circuits (IC) has long been a challenge due to numerous
constraints (such as symmetry and topology-matching) that matter for overall circuit …
constraints (such as symmetry and topology-matching) that matter for overall circuit …