[PDF][PDF] Current Balancing Strategy for Paralleled SiC MOSFETS in Extremely Low Inductance Regime

A Janabi, L Shillaber, W Mu, W Yin… - IEEE TRANSACTIONS ON …, 2024 - techrxiv.org
In the context of paralleled Silicon Carbide (SiC) dies at low stray inductance, the current
imbalance proves to be exceptionally sensitive to the static parameters of the devices. Even …

Temperature Dependent Local Electric Field Transient Analysis and Measurement in High Voltage Power Module Packaging

M Chen, Y Wang, L Fan, Y Ding… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
Electrical field (E-field) concentration in the high voltage power module packaging, which is
one of the main causes of packaging failure, is not only highly related to the dielectric …

The Standard Cell SiC Die Embedding High Performance and Scalable Power Electronics Integration Approach

A Janabi, L Shillaber, W Ying, W Mu… - 2024 IEEE Energy …, 2024 - ieeexplore.ieee.org
This paper presents a new power electronic packaging approach termed Standard cell,
comprising a step-etched active metal brazed (AMB) substrate and a flexible printed circuit …