Robust GNN-based representation learning for HLS

A Sohrabizadeh, Y Bai, Y Sun… - 2023 IEEE/ACM …, 2023 - ieeexplore.ieee.org
The efficient and timely optimization of microarchitecture for a target application is hindered
by the long evaluation runtime of a design candidate, creating a serious burden. To tackle …

Democratizing domain-specific computing

Y Chi, W Qiao, A Sohrabizadeh, J Wang… - Communications of the …, 2022 - dl.acm.org
Democratizing Domain-Specific Computing Page 1 GENERAL-PURPOSE COMPUTERS
ARE widely used in our modern society. There were close to 24 million software …

Towards a comprehensive benchmark for high-level synthesis targeted to FPGAs

Y Bai, A Sohrabizadeh, Z Qin, Z Hu… - Advances in Neural …, 2023 - proceedings.neurips.cc
High-level synthesis (HLS) aims to raise the abstraction layer in hardware design, enabling
the design of domain-specific accelerators (DSAs) like field-programmable gate arrays …

Holistic Optimization Framework for FPGA Accelerators

S Pouget, M Lo, LN Pouchet, J Cong - arxiv preprint arxiv:2501.09242, 2025 - arxiv.org
Customized accelerators have transformed modern computing by enhancing energy
efficiency and performance through specialization. Field Programmable Gate Arrays play a …

ProgSG: Cross-Modality Representation Learning for Programs in Electronic Design Automation

Y Bai, A Sohrabizadeh, Z Qin, Z Hu, Y Sun… - arxiv preprint arxiv …, 2023 - arxiv.org
Recent years have witnessed the growing popularity of domain-specific accelerators
(DSAs), such as Google's TPUs, for accelerating various applications such as deep learning …