On the construction of structured LDPC codes free of small trap** sets

DV Nguyen, SK Chilappagari… - IEEE Transactions …, 2012 - ieeexplore.ieee.org
We present a method to construct low-density parity-check (LDPC) codes with low error
floors on the binary symmetric channel. Codes are constructed so that their Tanner graphs …

Rate-0.96 LDPC decoding VLSI for soft-decision error correction of NAND flash memory

J Kim, W Sung - IEEE Transactions on Very Large Scale …, 2013 - ieeexplore.ieee.org
The reliability of data stored in high-density Flash memory devices tends to decrease rapidly
because of the reduced cell size and multilevel cell technology. Soft-decision error …

A reduced-complexity architecture for LDPC layered decoding schemes

S Kim, GE Sobelman, H Lee - IEEE Transactions on Very Large …, 2010 - ieeexplore.ieee.org
A reduced-complexity low density parity check (LDPC) layered decoding architecture is
proposed using an offset permutation scheme in the switch networks. This method requires …

Advanced baseband processing algorithms, circuits, and implementations for 5G communication

C Zhang, YH Huang, F Sheikh… - IEEE Journal on …, 2017 - ieeexplore.ieee.org
The rapid emergence of 5G communications technology and standardization has seen an
accelerated transfer of theoretical concepts to advanced development and implementation …

Comprehensive algorithmic review and analysis of LDPC codes

W Ullah, A Yahya - TELKOMNIKA Indonesian Journal of …, 2015 - journal.esperg.com
Due to the increasing popularity of LDPC codes and its demand for future applications, first
time in this paper, LDPC coding techniques have been systematically summarized and …

An LDPC-coded SCMA receiver with multi-user iterative detection and decoding

WC Sun, YC Su, YL Ueng… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
This paper presents the first low-complexity realization of an LDPC-code sparse code
multiple access (SCMA) receiver with a high-throughput LDPC decoder and a multi-mode …

VLSI design for low-density parity-check code decoding

Z Wang, Z Cui, J Sha - IEEE Circuits and Systems Magazine, 2011 - ieeexplore.ieee.org
Low-Density Parity-check (LDPC) code, being one of the most promising near-Shannon limit
error correction codes (ECCs) in practice, has attracted tremendous attention in both …

An 847–955 Mb/s 342–397 mW Dual-Path Fully-Overlapped QC-LDPC Decoder for WiMAX System in 0.13 m CMOS

B **ang, D Bao, S Huang, X Zeng - IEEE Journal of Solid-State …, 2011 - ieeexplore.ieee.org
This paper presents a partially-parallel dual-path fully-overlapped QC-LDPC decoder for the
WiMAX system. By adopting five techniques including symmetrical six-stage pipelining …

Research on Data Link Channel Decoding Optimization Scheme for Drone Power Inspection Scenarios

H Yu, K Zhang, X Zhao, Y Zhang, B Cui, S Sun, G Liu… - Drones, 2023 - mdpi.com
With the rapid development of smart grids, the deployment number of transmission lines has
significantly increased, posing significant challenges to the detection and maintenance of …

VLSI architecture for layered decoding of QC-LDPC codes with high circulant weight

Y Sun, JR Cavallaro - IEEE transactions on very large scale …, 2012 - ieeexplore.ieee.org
In this brief, we propose a high-throughput layered decoder architecture to support a
broader family of quasicyclic low-density parity-check (QC-LDPC) codes, whose parity …