In a typical wireless mesh network (WMN), the interfering links can broadly be classified as
coordinated and non-coordinated links, depending upon the geometric relationship. It is …

Conventional 2D CMOS technology is reaching fundamental scaling limits, and interconnect
bottleneck is dominating integrated circuit (IC) power and performance. While 3D IC …

Hardware implementations of artificial neural networks (ANNs) have become feasible due to
the advent of persistent 2-terminal devices such as memristor, phase change memory, MTJs …

For beyond 2-D CMOS logic, transistor-level 3-D integrations such as monolithic 3-D [1],
Skybridge [2], SN3D [3] hold the most promise. However, such 3-D architectures within small …

For beyond 2-D CMOS logic, various 3-D integration approaches specially transistor based
3-D integrations such as monolithic 3-D [1], Skybridge [2], SN3D [3] holds most promise …

Thermal management is one of the critical challenges in 3D integrated circuits. Incorporating
thermal optimizations during the circuit design stages requires a convenient automatic …

A new 3D IC fabric named NP-Dynamic Skybridge is proposed that provides fine-grained
vertical 3D integration for future technology scaling. Relying on a template of vertical …

Design for power-delivery network (PDN) is one of the major challenges in 3D IC
technology. In the typical layer-by-layer stacked monolithic 3D (M3D) approaches, PDN has …

The papers in this special section focuses on emerging technologies and designs for
application specific computing systems. As device technology has rapidly evolved …

The semiconductor revolution so far has been primarily driven by the ability to shrink devices
and interconnects proportionally (Moore's law) while achieving incremental benefits. In sub …