A new technique is proposed to dramatically reduce the impact of fractional spurs in sigma-
delta (ΣΔ) fractional-N synthesisers. The key innovation is the introduction in the bitstream …

Digital-to-time converters (DTC's) used in fractional-phase locked loops (PLL's) aim to zero
the quantization error (QE) introduced by the divider controller in order to recover integer …

Noise sha** digital quantizers, most commonly digital delta-sigma (ΔΣ) modulators, are
used in fractional-N phase-locked loops (PLLs) to enable fractional frequency tuning …

Fractional-N phase-locked loops (PLLs) are widely used to synthesize local oscillator
signals for modulation and demodulation in communication systems. Such PLLs generate …

Fractional-N frequency synthesizers exhibit spurious tones (spurs). Spurs outside the loop
bandwidth can be attenuated by the loop filter. By contrast, in-band spurs cannot be …

Fractional-N phase-locked loops (PLLs) typically use noise-sha** coarse quantizers to
control their instantaneous output frequency. The resulting quantization noise and its …

The divider controller in a conventional phase-locked loop fractional-frequency synthesizer
modulates the instantaneous division ratio of the feedback divider. The divider controller is …

The standard design methodology for fractional-N frequency synthesizers assumes that the
filtered shaped quantization noise from the requantizer is masked below the spectral …

A MASH DDSM is conventionally employed in a fractional-N frequency synthesizer as the
divider controller. The quantization noise of the MASH DDSM adds to the output phase …

The effect of the quantization noise introduced by AΣ modulators in fractional-N phase
locked loop is studied in the time domain through a variational model of the corresponding …