Stream processing dual-track CGRA for object inference

X Fan, D Wu, W Cao, W Luk… - IEEE Transactions on Very …, 2018 - ieeexplore.ieee.org
With the development of machine learning technology, the exploration of energy-efficient
and flexible architectures for object inference algorithms is of growing interest in recent …

MeXT: A flow for multiprocessor exploration

C Bobda, H Ishebabi, P Mahr… - 2019 IEEE High …, 2019 - ieeexplore.ieee.org
This paper presents an extended design approach for heterogeneous multiprocessor
systems. The goal in this particular design exploration approach is to ease the …

[책][B] A hybrid partially reconfigurable overlay supporting just-in-time assembly of custom accelerators on FPGAs

ZT Aklah - 2017 - search.proquest.com
The state of the art in design and development flows for FPGAs are not sufficiently mature to
allow programmers to implement their applications through traditional software development …

Improving the productivity of high-level synthesis by advancing reuseability and verifiability

L Yang - 2017 - dr.ntu.edu.sg
As the complexity of applications continues to grow to meet user demands, the complexity of
hardware platforms continues to grow correspondingly. Thus, the hardware design flow is a …

BENCHMARK OF TRIGGERED INSTRUCTION BASED COARSE GRAINED RECONFIGURABLE ARCHITECTURE FOR RADIO BASE STATION

Y Yang - 2014 - diva-portal.org
Spatially-programmed architectures such as FPGA are among the most prevailing hardware
in various application areas. However FPGA suffers from great overheads such as area …

[PDF][PDF] Highly Expandable Reconfigurable Platform using Multi-FPGA based Boards

S Hammad, M Hasnain - International Journal of Computer …, 2012 - academia.edu
Reconfigurable computing has become an essential part of research since last few decades.
By placing computationally intensive applications in the reconfigurable logic area of the …