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Multi-voltage CMOS circuit design
V Kursun, EG Friedman - 2006 - books.google.com
This book presents an in-depth treatment of various power reduction and speed
enhancement techniques based on multiple supply and threshold voltages. A detailed …
enhancement techniques based on multiple supply and threshold voltages. A detailed …
Deep residual learning for image recognition
Deeper neural networks are more difficult to train. We present a residual learning framework
to ease the training of networks that are substantially deeper than those used previously. We …
to ease the training of networks that are substantially deeper than those used previously. We …
Modeling of wide bandgap power semiconductor devices—Part I
HA Mantooth, K Peng, E Santi… - IEEE Transactions on …, 2014 - ieeexplore.ieee.org
Wide bandgap power devices have emerged as an often superior alternative power switch
technology for many power electronic applications. These devices theoretically have …
technology for many power electronic applications. These devices theoretically have …
Transistor sizing issues and tool for multi-threshold CMOS technology
J Kao, A Chandrakasan, D Antoniadis - Proceedings of the 34th annual …, 1997 - dl.acm.org
Multi-threshold CMOS is an increasingly popular circuitapproach that enables high
performance and low power operation. However, no methodologies have been developed …
performance and low power operation. However, no methodologies have been developed …
Delay analysis of series-connected MOSFET circuits
T Sakurai, AR Newton - IEEE Journal of Solid-State Circuits, 1991 - ieeexplore.ieee.org
In order to derive analytical delay expressions for CMOS gates in the submicrometer region,
a realistic MOS model which incorporates an nth power law MOS model is developed …
a realistic MOS model which incorporates an nth power law MOS model is developed …
Impact of power-supply noise on timing in high-frequency microprocessors
M Saint-Laurent, M Swaminathan - IEEE Transactions on …, 2004 - ieeexplore.ieee.org
This paper analyzes the impact of power-supply noise on the performance of high-frequency
microprocessors. First, delay models that take this noise into account are proposed for …
microprocessors. First, delay models that take this noise into account are proposed for …
[KNIHA][B] Low-power electronics design
C Piguet - 2018 - books.google.com
The power consumption of integrated circuits is one of the most problematic considerations
affecting the design of high-performance chips and portable devices. The study of power …
affecting the design of high-performance chips and portable devices. The study of power …
An accurate and fast method for conducted EMI modeling and simulation of MMC-based HVdc converter station
The analysis of electromagnetic interference (EMI) noise of power electronic circuits involves
both the transient characteristics of power semiconductor devices and the wideband stray …
both the transient characteristics of power semiconductor devices and the wideband stray …
Low-voltage-swing monolithic dc-dc conversion
A low-voltage-swing MOSFET gate drive technique is proposed in this paper for enhancing
the efficiency characteristics of high-frequency-switching dc-dc converters. The parasitic …
the efficiency characteristics of high-frequency-switching dc-dc converters. The parasitic …
Simultaneous switching noise in on-chip CMOS power distribution networks
KT Tang, EG Friedman - … on Very Large Scale Integration (VLSI …, 2002 - ieeexplore.ieee.org
Simultaneous switching noise (SSN) has become an important issue in the design of the
internal on-chip power distribution networks in current very large scale integration/ultra large …
internal on-chip power distribution networks in current very large scale integration/ultra large …