Chip floorplanning is the engineering task of designing the physical layout of a computer
chip. Despite five decades of research, chip floorplanning has defied automation, requiring …

Given the significance of placement in IC physical design, extensive research studies
performed over the last 50 years addressed numerous aspects of global and detailed …

Placement is a critical step in modern chip design, aiming to determine the positions of
circuit modules on the chip canvas. Recent works have shown that reinforcement learning …

Placement is an essential task in modern chip design, aiming at placing millions of circuit
modules on a 2D chip canvas. Unlike the human-centric solution, which requires months of …

Placement is essential in very large-scale integration (VLSI) physical design, as it directly
affects the design cycle. Despite extensive prior research on placement, achieving fast and …

For its advantage in GPU acceleration and less dependency on human experts, machine
learning has been an emerging tool for solving the placement and routing problems, as two …

Macro placement is a crucial step in modern chip design, and reinforcement learning (RL)
has recently emerged as a promising technique for improving the placement quality …

Through-Silicon-Via (TSV) is the enabling technology for the fine-grained 3D integration of
multiple dies into a single stack. These TSVs occupy non-negligible silicon area because of …

We propose a self-contained, flat, quadratic global placer that is simpler than existing
placers and easier to integrate into timing-closure flows. It maintains lower-bound and upper …

We develop a flat, analytic, and nonlinear placement algorithm, ePlace, which is more
effective, generalized, simpler, and faster than previous works. Based on the analogy …